ATMEGA128-16MN Atmel, ATMEGA128-16MN Datasheet - Page 133
![MCU AVR 128KB FLASH 16MHZ 64QFN](/photos/12/13/121326/313-64-qfn_sml.jpg)
ATMEGA128-16MN
Manufacturer Part Number
ATMEGA128-16MN
Description
MCU AVR 128KB FLASH 16MHZ 64QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA128-16MN
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK501 - ADAPTER KIT FOR 64PIN AVR MCUATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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2467V–AVR–02/11
Table 59
mode
Table 59. Compare Output Mode, Fast PWM
Note:
Table 59
rect and frequency correct PWM mode.
Table 60. Compare Output Mode, Phase Correct and Phase and Frequency Correct PWM
Note:
COMnA1/COMnB1/
COMnA1/COMnB1/
COMnC1
COMnC1
A
COMnA1/COMnB1/COMnC1 is set. In this case the compare match is ignored, but the set or clear
is done at BOTTOM.
A
COMnA1/COMnB1//COMnC1 is set.
details.
shows the COMnx1:0 bit functionality when the WGMn3:0 bits are set to the phase cor-
shows the COMnx1:0 bit functionality when the WGMn3:0 bits are set to the fast PWM
0
0
1
1
0
0
1
1
special
special
case
case
COMnA0/COMnB0/
COMnA0/COMnB0/
See “Fast PWM Mode” on page 124.
COMnC0
COMnC0
occurs
occurs
0
1
0
1
0
1
0
1
when
when
See “Phase Correct PWM Mode” on page 126.
Description
Normal port operation, OCnA/OCnB/OCnC
disconnected.
WGMn3:0 = 15: Toggle OCnA on Compare
Match, OCnB/OCnC disconnected (normal
port operation).
For all other WGMn settings, normal port
operation, OCnA/OCnB/OCnC
disconnected.
Clear OCnA/OCnB/OCnC on compare
match, set OCnA/OCnB/OCnC at BOTTOM,
(non-inverting mode)
Set OCnA/OCnB/OCnC on compare match,
clear OCnA/OCnB/OCnC at BOTTOM,
(inverting mode)
Description
Normal port operation, OCnA/OCnB/OCnC
disconnected.
WGMn3:0 = 9 or 11: Toggle OCnA on
Compare Match, OCnB/OCnC disconnected
(normal port operation).
For all other WGMn settings, normal port
operation, OCnA/OCnB/OCnC
disconnected.
Clear OCnA/OCnB/OCnC on compare
match when up-counting. Set
OCnA/OCnB/OCnC on compare match
when downcounting.
Set OCnA/OCnB/OCnC on compare match
when up-counting. Clear
OCnA/OCnB/OCnC on compare match
when downcounting.
OCRnA/OCRnB/OCRnC
OCRnA/OCRnB/OCRnC
for more details.
ATmega128
equals
equals
TOP
TOP
for more
133
and
and
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