ATMEGA128-16MN Atmel, ATMEGA128-16MN Datasheet - Page 178
![MCU AVR 128KB FLASH 16MHZ 64QFN](/photos/12/13/121326/313-64-qfn_sml.jpg)
ATMEGA128-16MN
Manufacturer Part Number
ATMEGA128-16MN
Description
MCU AVR 128KB FLASH 16MHZ 64QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA128-16MN
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK501 - ADAPTER KIT FOR 64PIN AVR MCUATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Sending Frames with
9 Data Bit
Transmitter Flags and
Interrupts
178
ATmega128
If 9-bit characters are used (UCSZ = 7), the ninth bit must be written to the TXB8 bit in UCSRB
before the low byte of the character is written to UDR. The following code examples show a
transmit function that handles 9 bit characters. For the assembly code, the data to be sent is
assumed to be stored in Registers R17:R16.
Note:
The ninth bit can be used for indicating an address frame when using multi processor communi-
cation mode or for other protocol handling as for example synchronization.
The USART Transmitter has two flags that indicate its state: USART Data Register Empty
(UDRE) and Transmit Complete (TXC). Both flags can be used for generating interrupts.
The Data Register Empty (UDRE) flag indicates whether the transmit buffer is ready to receive
new data. This bit is set when the transmit buffer is empty, and cleared when the transmit buffer
contains data to be transmitted that has not yet been moved into the Shift Register. For compat-
ibility with future devices, always write this bit to zero when writing the UCSRA Register.
When the Data Register empty Interrupt Enable (UDRIE) bit in UCSRB is written to one, the
USART Data Register Empty Interrupt will be executed as long as UDRE is set (provided that
global interrupts are enabled). UDRE is cleared by writing UDR. When interrupt-driven data
Assembly Code Example
C Code Example
USART_Transmit:
void USART_Transmit( unsigned int data )
{
}
; Wait for empty transmit buffer
sbis UCSRA,UDRE
rjmp USART_Transmit
; Copy 9th bit from r17 to TXB8
cbi
sbrc r17,0
sbi
; Put LSB data (r16) into buffer, sends the data
out
ret
/* Wait for empty transmit buffer */
while ( !( UCSRA & (1<<UDRE)) )
/* Copy 9th bit to TXB8 */
UCSRB &= ~(1<<TXB8);
if ( data & 0x0100 )
/* Put data into buffer, sends the data */
UDR = data;
1. These transmit functions are written to be general functions. They can be optimized if the con-
UCSRB |= (1<<TXB8);
tents of the UCSRB is static. I.e., only the TXB8 bit of the UCSRB Register is used after
initialization.
For I/O registers located in extended I/O map, “IN”, “OUT”, “SBIS”, “SBIC”, “CBI”, and “SBI”
instructions must be replaced with instructions that allow access to extended I/O. Typically
“LDS” and “STS” combined with “SBRS”, “SBRC”, “SBR”, and “CBR”.
UCSRB,TXB8
UCSRB,TXB8
UDR,r16
;
(1)
2467V–AVR–02/11
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