ATMEGA128-16MN Atmel, ATMEGA128-16MN Datasheet - Page 159
![MCU AVR 128KB FLASH 16MHZ 64QFN](/photos/12/13/121326/313-64-qfn_sml.jpg)
ATMEGA128-16MN
Manufacturer Part Number
ATMEGA128-16MN
Description
MCU AVR 128KB FLASH 16MHZ 64QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA128-16MN
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK501 - ADAPTER KIT FOR 64PIN AVR MCUATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Timer/Counter
Interrupt Flag Register
– TIFR
2467V–AVR–02/11
• Bit 7 – OCF2: Output Compare Flag 2
The OCF2 bit is set (one) when a compare match occurs between the Timer/Counter2 and the
data in OCR2 – Output Compare Register2. OCF2 is cleared by hardware when executing the
corresponding interrupt handling vector. Alternatively, OCF2 is cleared by writing a logic one to
the flag. When the I-bit in SREG, OCIE2 (Timer/Counter2 Compare Match Interrupt Enable), and
OCF2 are set (one), the Timer/Counter2 Compare Match Interrupt is executed.
• Bit 6 – TOV2: Timer/Counter2 Overflow Flag
The bit TOV2 is set (one) when an overflow occurs in Timer/Counter2. TOV2 is cleared by hard-
ware when executing the corresponding interrupt handling vector. Alternatively, TOV2 is cleared
by writing a logic one to the flag. When the SREG I-bit, TOIE2 (Timer/Counter2 Overflow Inter-
rupt Enable), and TOV2 are set (one), the Timer/Counter2 Overflow interrupt is executed. In
PWM mode, this bit is set when Timer/Counter2 changes counting direction at $00.
Bit
Read/Write
Initial Value
OCF2
R/W
7
0
TOV2
R/W
6
0
ICF1
R/W
5
0
OCF1A
R/W
4
0
OCF1B
R/W
3
0
TOV1
R/W
2
0
OCF0
R/W
1
0
TOV0
R/W
ATmega128
0
0
TIFR
159
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