ATMEGA128-16MN Atmel, ATMEGA128-16MN Datasheet - Page 184
![MCU AVR 128KB FLASH 16MHZ 64QFN](/photos/12/13/121326/313-64-qfn_sml.jpg)
ATMEGA128-16MN
Manufacturer Part Number
ATMEGA128-16MN
Description
MCU AVR 128KB FLASH 16MHZ 64QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA128-16MN
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK501 - ADAPTER KIT FOR 64PIN AVR MCUATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 184 of 385
- Download datasheet (8Mb)
Asynchronous Clock
Recovery
Asynchronous Data
Recovery
184
ATmega128
The clock recovery logic synchronizes internal clock to the incoming serial frames.
illustrates the sampling process of the start bit of an incoming frame. The sample rate is 16 times
the baud rate for normal mode, and 8 times the baud rate for Double Speed mode. The horizon-
tal arrows illustrate the synchronization variation due to the sampling process. Note the larger
time variation when using the double speed mode (U2X = 1) of operation. Samples denoted zero
are samples done when the RxD line is idle (i.e., no communication activity).
Figure 83. Start Bit Sampling
When the clock recovery logic detects a high (idle) to low (start) transition on the RxD line, the
start bit detection sequence is initiated. Let sample 1 denote the first zero-sample as shown in
the figure. The clock recovery logic then uses samples 8, 9, and 10 for normal mode, and sam-
ples 4, 5, and 6 for Double Speed mode (indicated with sample numbers inside boxes on the
figure), to decide if a valid start bit is received. If two or more of these three samples have logical
high levels (the majority wins), the start bit is rejected as a noise spike and the receiver starts
looking for the next high to low-transition. If however, a valid start bit is detected, the clock recov-
ery logic is synchronized and the data recovery can begin. The synchronization process is
repeated for each start bit.
When the receiver clock is synchronized to the start bit, the data recovery can begin. The data
recovery unit uses a state machine that has 16 states for each bit in normal mode and 8 states
for each bit in Double Speed mode.
bit. Each of the samples is given a number that is equal to the state of the recovery unit.
Figure 84. Sampling of Data and Parity Bit
The decision of the logic level of the received bit is taken by doing a majority voting of the logic
value to the three samples in the center of the received bit. The center samples are emphasized
on the figure by having the sample number inside boxes. The majority voting process is done as
follows: If two or all three samples have high levels, the received bit is registered to be a logic 1.
If two or all three samples have low levels, the received bit is registered to be a logic 0. This
majority voting process acts as a low pass filter for the incoming signal on the RxD pin. The
recovery process is then repeated until a complete frame is received. Including the first stop bit.
Note that the receiver only uses the first stop bit of a frame.
stop bit and the earliest possible beginning of the start bit of the next frame.
(U2X = 0)
(U2X = 1)
(U2X = 0)
(U2X = 1)
Sample
Sample
Sample
Sample
RxD
RxD
0
0
IDLE
0
1
1
1
1
2
2
3
2
3
2
4
4
Figure 84
5
3
5
3
6
6
7
7
4
4
shows the sampling of the data bits and the parity
8
8
START
BIT n
9
5
9
5
10
10
11
11
6
6
Figure 85
12
12
13
13
7
7
shows the sampling of the
14
14
15
15
8
8
16
16
1
1
1
1
2467V–AVR–02/11
2
BIT 0
Figure 83
3
2
Related parts for ATMEGA128-16MN
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![ATMEGA128](/images/manufacturer_photos/0/0/79/atmel_corporation_tmb.jpg)
Part Number:
Description:
Manufacturer:
ATMEL Corporation
Datasheet:
![ATMEGA128-8AC](/images/manufacturer_photos/0/0/79/atmel_corporation_tmb.jpg)
Part Number:
Description:
Microcontroller with 128K bytes In-system programmable flash, 8 MHz, power supply =2.7 - 5.5V
Manufacturer:
ATMEL Corporation
Datasheet:
![ATMEGA128-16AU](/photos/12/13/121332/313-64-tqfp_tmb.jpg)
Part Number:
Description:
IC AVR MCU 128K 16MHZ 5V 64TQFP
Manufacturer:
Atmel
Datasheet:
![ATMEGA128-16MU](/photos/12/13/121326/313-64-qfn_tmb.jpg)
Part Number:
Description:
IC AVR MCU 128K 16MHZ 5V 64-QFN
Manufacturer:
Atmel
Datasheet:
![ATMEGA128-16MC](/images/manufacturer_photos/0/0/78/atmel_tmb.jpg)
Part Number:
Description:
IC AVR MCU 128K 16MHZ COM 64-QFN
Manufacturer:
Atmel
Datasheet:
![ATMEGA128-16AC](/photos/12/13/121332/313-64-tqfp_tmb.jpg)
Part Number:
Description:
IC AVR MCU 128K 16MHZ 64-TQFP
Manufacturer:
Atmel
Datasheet:
![ATMEGA128-16AI](/photos/12/13/121332/313-64-tqfp_tmb.jpg)
Part Number:
Description:
IC AVR MCU 128K 16MHZ 64-TQFP
Manufacturer:
Atmel
Datasheet:
![ATMEGA128-16MI](/images/manufacturer_photos/0/0/78/atmel_tmb.jpg)
Part Number:
Description:
IC AVR MCU 128K 16MHZ IND 64-QFN
Manufacturer:
Atmel
Datasheet:
![ATMEGA128-16AUR](/photos/12/13/121332/313-64-tqfp_tmb.jpg)
Part Number:
Description:
MCU AVR 128KB FLASH 16MHZ 64TQFP
Manufacturer:
Atmel
Datasheet:
![ATMEGA128-16MUR](/photos/12/13/121326/313-64-qfn_tmb.jpg)
Part Number:
Description:
MCU AVR 128KB FLASH 16MHZ 64QFN
Manufacturer:
Atmel
Datasheet:
![ATMEGA128-16AN](/photos/12/13/121332/313-64-tqfp_tmb.jpg)
Part Number:
Description:
MCU AVR 128KB FLASH 16MHZ 64TQFP
Manufacturer:
Atmel
Datasheet: