ATMEGA128-16MN Atmel, ATMEGA128-16MN Datasheet - Page 286
![MCU AVR 128KB FLASH 16MHZ 64QFN](/photos/12/13/121326/313-64-qfn_sml.jpg)
ATMEGA128-16MN
Manufacturer Part Number
ATMEGA128-16MN
Description
MCU AVR 128KB FLASH 16MHZ 64QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA128-16MN
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK501 - ADAPTER KIT FOR 64PIN AVR MCUATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Memory
Programming
Program and Data
Memory Lock Bits
286
ATmega128
The Atmel
can be programmed (“0”) to obtain the additional features listed in
only be erased to “1” with the Chip Erase command.
Table 115. Lock Bit Byte
Note:
Table 116. Lock Bit Protection Modes
BLB12
BLB11
BLB02
BLB01
LB2
LB1
BLB0 mode
BLB1 mode
LB mode
Lock Bit Byte
1
2
3
1
2
3
4
Memory Lock Bits
“1” means unprogrammed, “0´means programmed
®
AVR
BLB02
BLB12
LB2
®
ATmega128 provides six Lock bits which can be left unprogrammed (“1”) or
1
1
0
1
1
0
0
BLB01
BLB11
LB1
Bit No.
1
0
0
1
0
0
1
7
6
5
4
3
2
1
0
Protection Type
No memory lock features enabled.
Further programming of the Flash and EEPROM is
disabled in Parallel and SPI/JTAG Serial Programming
mode. The Fuse bits are locked in both Serial and Parallel
Programming mode.
Further programming and verification of the Flash and
EEPROM is disabled in Parallel and SPI/JTAG Serial
Programming mode. The Fuse bits are locked in both
Serial and Parallel Programming mode.
No restrictions for SPM or (E)LPM accessing the
Application section.
SPM is not allowed to write to the Application section.
SPM is not allowed to write to the Application section, and
(E)LPM executing from the Boot Loader section is not
allowed to read from the Application section. If interrupt
vectors are placed in the Boot Loader section, interrupts
are disabled while executing from the Application section.
(E)LPM executing from the Boot Loader section is not
allowed to read from the Application section. If interrupt
vectors are placed in the Boot Loader section, interrupts
are disabled while executing from the Application section.
Description
–
–
Boot lock bit
Boot lock bit
Boot lock bit
Boot lock bit
Lock bit
Lock bit
(1)
Default Value
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
Table
(1)
116. The Lock bits can
2467V–AVR–02/11
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