ATMEGA128-16MN Atmel, ATMEGA128-16MN Datasheet - Page 17
![MCU AVR 128KB FLASH 16MHZ 64QFN](/photos/12/13/121326/313-64-qfn_sml.jpg)
ATMEGA128-16MN
Manufacturer Part Number
ATMEGA128-16MN
Description
MCU AVR 128KB FLASH 16MHZ 64QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA128-16MN
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK501 - ADAPTER KIT FOR 64PIN AVR MCUATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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AVR
ATmega128
Memories
In-System
Reprogrammable
Flash Program
Memory
2467V–AVR–02/11
This section describes the different memories in the Atmel
tecture has two main memory spaces, the Data Memory and the Program Memory space. In
addition, the ATmega128 features an EEPROM Memory for data storage. All three memory
spaces are linear and regular.
The ATmega128 contains 128Kbytes On-chip In-System Reprogrammable Flash memory for
program storage. Since all AVR instructions are 16 or 32 bits wide, the Flash is organized as
64K x 16. For software security, the Flash Program memory space is divided into two sections,
Boot Program section and Application Program section.
The Flash memory has an endurance of at least 10,000 write/erase cycles. The ATmega128
Program Counter (PC) is 16 bits wide, thus addressing the 64K program memory locations. The
operation of Boot Program section and associated Boot Lock bits for software protection are
described in detail in
273.
in SPI, JTAG, or Parallel Programming mode.
Constant tables can be allocated within the entire program memory address space (see the LPM
– Load Program Memory and ELPM – Extended Load Program Memory instruction description).
Timing diagrams for instruction fetch and execution are presented in
ing” on page
Figure 8. Program Memory Map
“Memory Programming” on page 286
13.
“Boot Loader Support – Read-While-Write Self-Programming” on page
Application Flash Section
Boot Flash Section
Program Memory
contains a detailed description on Flash programming
®
AVR
$0000
$FFFF
®
ATmega128. The AVR archi-
“Instruction Execution Tim-
ATmega128
17
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