ATMEGA128-16MN Atmel, ATMEGA128-16MN Datasheet - Page 290
![MCU AVR 128KB FLASH 16MHZ 64QFN](/photos/12/13/121326/313-64-qfn_sml.jpg)
ATMEGA128-16MN
Manufacturer Part Number
ATMEGA128-16MN
Description
MCU AVR 128KB FLASH 16MHZ 64QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA128-16MN
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK501 - ADAPTER KIT FOR 64PIN AVR MCUATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Parallel
Programming
Parameters, Pin
Mapping, and
Commands
Signal Names
290
ATmega128
This section describes how to parallel program and verify Flash Program memory, EEPROM
Data memory, Memory Lock bits, and Fuse bits in the Atmel
assumed to be at least 250ns unless otherwise noted.
In this section, some pins of the ATmega128 are referenced by signal names describing their
functionality during parallel programming, see
the following table are referenced by pin names.
The XA1/XA0 pins determine the action executed when the XTAL1 pin is given a positive pulse.
The bit coding is shown in
When pulsing WR or OE, the command loaded determines the action executed. The different
Commands are shown in
Figure 135. Parallel Programming
Table 120. Pin Name Mapping
Signal Name in
Programming Mode
RDY/BSY
OE
WR
BS1
XA0
XA1
RDY/BSY
PAGEL
+12 V
Pin Name
BS2
BS1
XA0
XA1
WR
OE
Table
PD1
PD2
PD3
PD4
PD5
PD6
Table
123.
122.
I/O
O
I
I
I
I
I
PD1
PD2
PD3
PD4
PD5
PD6
PD7
RESET
XTAL1
GND
PA0
Function
0: Device is busy programming, 1: Device is ready for new
command
Output Enable (Active low)
Write Pulse (Active low)
Byte Select 1 (“0” selects low byte, “1” selects high byte)
XTAL Action Bit 0
XTAL Action Bit 1
Figure 135
PB7 - PB0
AVCC
VCC
and
®
Table
AVR
+5V
+5V
®
120. Pins not described in
ATmega128. Pulses are
DATA
2467V–AVR–02/11
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