AT32UC3B0256-Z2UT Atmel, AT32UC3B0256-Z2UT Datasheet - Page 281

IC MCU AVR32 256KB FLASH 64-QFN

AT32UC3B0256-Z2UT

Manufacturer Part Number
AT32UC3B0256-Z2UT
Description
IC MCU AVR32 256KB FLASH 64-QFN
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheets

Specifications of AT32UC3B0256-Z2UT

Core Processor
AVR
Core Size
32-Bit
Speed
60MHz
Connectivity
I²C, IrDA, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
44
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-QFN
Processor Series
AT32UC3x
Core
AVR32
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
44
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR32, EWAVR32-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1101
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Package
64QFN EP
Device Core
AVR32
Family Name
AT32
Maximum Speed
60 MHz
Operating Supply Voltage
1.8|3.3 V
For Use With
ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMR770-1008 - ISP 4PORT ATMEL AVR32 MCU SPIATSTK600-TQFP64-2 - STK600 SOCKET/ADAPTER FOR 64-TQFATEVK1101 - KIT DEV/EVAL FOR AVR32 AT32UC3B
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT32UC3B0256-Z2UT
Manufacturer:
ATMEL
Quantity:
444
• DATNB: Data Number per Frame
• MSBF: Most Significant Bit First
• LOOP: Loop Mode
• DATLEN: Data Length
32059K–03/2011
DATLEN
Others
8-15
This field defines the number of data words to be received after each transfer start, which is equal to (DATNB + 1).
1: The most significant bit of the data register is sampled first in the bit stream.
0: The lowest significant bit of the data register is sampled first in the bit stream.
1: RX_DATA is driven by TX_DATA, RX_FRAME_SYNC is driven by TX_FRAME_SYNC and TX_CLOCK drives RX_CLOCK.
0: Normal operating mode.
The bit stream contains (DATLEN + 1) data bits.
This field also defines the transfer size performed by the Peripheral DMA Controller assigned to the receiver.
1-7
0
Transfer Size
Forbidden value
Data transfer are in bytes
Data transfer are in halfwords
Data transfer are in words
AT32UC3B
281

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