AT32UC3B0256-Z2UT Atmel, AT32UC3B0256-Z2UT Datasheet - Page 376

• Manufacturer Part Number: AT32UC3B0256-Z2UT
• Description: IC MCU AVR32 256KB FLASH 64-QFN
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3B0256-Z2UT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 60MHz
• Connectivity: I²C, IrDA, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-QFN
• Processor Series: AT32UC3x
• Core: AVR32
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: 2-Wire, SPI, USART
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 44
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR32, EWAVR32-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1101
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Package: 64QFN EP
• Device Core: AVR32
• Family Name: AT32
• Maximum Speed: 60 MHz
• Operating Supply Voltage: 1.8|3.3 V
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMR770-1008 - ISP 4PORT ATMEL AVR32 MCU SPIATSTK600-TQFP64-2 - STK600 SOCKET/ADAPTER FOR 64-TQFATEVK1101 - KIT DEV/EVAL FOR AVR32 AT32UC3B
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

22.7.1.8
32059K–03/2011
Plug-In detection
Figure 22-10. Pad Events
The SUSP bit is set and the Wake-Up Interrupt (WAKEUP) bit in UDINT is cleared when a USB
“Suspend” state has been detected on the USB bus. This event automatically puts the USB pad
in the Idle state. The detection of a non-idle event sets WAKEUP, clears SUSP and wakes up
the USB pad.
Moreover, the pad goes to the Idle state if the macro is disabled or if the DETACH bit is written to
one. It returns to the Active state when USBE is written to one and DETACH is written to zero.
The USB connection is detected from the USB_VBUS pad.
architecture of the plug-in detector.
Figure 22-11. Plug-In Detection Input Block Diagram
The control logic of the USB_VBUS pad outputs two signals:
In device mode, the USBSTA.VBUS bit follows the Session_valid comparator output:
• The Session_valid signal is high when the voltage on the USB_VBUS pad is higher than or
• The Va_Vbus_valid signal is high when the voltage on the USB_VBUS pad is higher than or
• It is set when the voltage on the USB_VBUS pad is higher than or equal to 1.4V.
equal to 1.4V.
equal to 4.4V.
USB_VBUS
SUSP
WAKEUP
PAD State
Pad Logic
GND
VDD
Suspend detected
Active
Session_valid
Va_Vbus_valid
VBus_pulsing
VBus_discharge
Wake-up detected
Idle
Logic
Cleared on wake-up
USBSTA
Cleared by software to acknowledge the interrupt
Figure 22-11 on page 376
VBUS
Active
AT32UC3B
VBUSTI
USBSTA
shows the
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