ST7FDALIF2M6TR STMicroelectronics, ST7FDALIF2M6TR Datasheet - Page 112
![IC MCU 8BIT 8K FLASH 20-SOIC](/photos/6/56/65691/497-20-soic__7_5mm_width__series_sml.jpg)
ST7FDALIF2M6TR
Manufacturer Part Number
ST7FDALIF2M6TR
Description
IC MCU 8BIT 8K FLASH 20-SOIC
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet
1.ST7DALI-EVAL.pdf
(171 pages)
Specifications of ST7FDALIF2M6TR
Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
DALI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SOIC (7.5mm Width)
Processor Series
ST7DALI
Core
ST7
Data Bus Width
8 bit
Data Ram Size
384 B
Interface Type
DALI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
15
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7FLITE-SK/RAIS, ST7DALI-EVAL, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 7 Channel / 13 bit, 7 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ST7FDALIF2M6TR
Manufacturer:
NEC
Quantity:
670
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- Download datasheet (2Mb)
Serial peripheral interface (SPI)
17.7.3
Note:
Caution:
112/171
1: Slave deselected
Data I/O register (SPIDR)
Read/Write
Reset Value: Undefined
The SPIDR register is used to transmit and receive data on the serial bus. In a master
device, a write to this register will initiate transmission/reception of another byte.
During the last clock cycle the SPIF bit is set, a copy of the received data byte in the shift
register is moved to a buffer. When the user reads the serial peripheral data I/O register, the
buffer is actually being read.
While the SPIF bit is set, all writes to the SPIDR register are inhibited until the SPICSR
register is read.
A write to the SPIDR register places data directly into the shift register for transmission.
A read to the SPIDR register returns the value located in the buffer and not the content of
the shift register (see
Table 49.
0031h
0032h
0033h
Address
(Hex.)
D7
7
SPIDR
Reset
Value
SPICR
Reset
Value
SPICSR
Reset
Value
Register
SPI register map and reset values
label
D6
Figure
MSB
x
SPIE
0
SPIF
0
7
D5
45).
x
SPE
0
WCOL
0
6
D4
x
SPR2
0
OVR
0
5
MODF
MSTR
D3
4
x
0
0
CPOL
3
x
x
0
D2
CPHA
SOD
2
0
x
x
D1
SPR1
SSM
1
x
x
0
ST7DALIF2
D0
SPR0
0
LSB
SSI
0
0
x
x
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