ST7FDALIF2M6TR STMicroelectronics, ST7FDALIF2M6TR Datasheet - Page 91

• Manufacturer Part Number: ST7FDALIF2M6TR
• Description: IC MCU 8BIT 8K FLASH 20-SOIC
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST7FDALIF2M6TR

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: DALI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 5.5 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SOIC (7.5mm Width)
• Processor Series: ST7DALI
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 384 B
• Interface Type: DALI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7FLITE-SK/RAIS, ST7DALI-EVAL, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 7 Channel / 13 bit, 7 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ST7DALIF2
16.3
DALI standard protocol
The DALI protocol uses the bi-phase Manchester asynchronous serial data format. All the
bits of the frame are bi-phase encoded except the two stop bits.
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■
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A forward frame consists of 19 bi-phase encoded bits: 1 start bit (logical ’1’), 1 address byte
and 1 data byte. The frame is terminated by 2 stop bits (idle). The stop bits do not contain
any change of phase.
A backward frame consists of 11 bi-phase encoded bits: 1 start bit (logical ’1’) and 1 data
byte. The frame is terminated by 2 stop bits (idle). The stop bits do not contain any change
of phase.
The transmission rate, expressed as a bandwidth, is specified at 1.2 kHz for the forward
channel and for the backward channel.
The settling time between two subsequent forward frames is 9.17 ms (minimum).
The settling time between forward and backward frames is between 2.92 ms and 9.17 ms. If
a backward frame has not been started after 9.17 ms, this is interpreted as "no answer".
In the event of code violation, the frame is ignored. After a code violation has occurred, the
system is ready again for data reception.
Figure 42. DALI standard frame
The transmission rate is about 1.2 kHz. The bi-phase bit period is 833.33 us ±10%.
A forward frame consists of 19 bi-phase encoded bits:
– 1 start bit (0->1: logical ’1’)
– 1 address byte (8-bit address)
– 1 data byte (8-bit data)
– 2 high level stop bits (no change of phase)
A backward frame consists of 11 bi-phase encoded bits:
– 1 start bit (0->1: logical ’1’)
– 1 data byte (8-bit data)
– 2 high level stop bits (no change of phase)
start bit
2T
a7
2T
a6
2T
a5
2T
start bit
address byte
a4
2T
2T
Logical ’1’
a3
2T
d7
2T
a2
2T
d6
2T
BACKWARD FRAME
FORWARD FRAME
a1
2T 2T
d5
2T
2T
BI-PHASE LEVELS
data byte
a0
d4
2T
2T
d7
d3
2T
2T
d6
d2
2T
2T
2T
d5
d1
2T 2T
Logical ’0’
data byte
2T
d4
d0
DALI communication module
2T
d3
stop bits
2T = 833.33 us ±10%
4T
2T
d2
2T
d1
2T
d0
stop bits
4T
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