S9S12P64J0MFT Freescale Semiconductor, S9S12P64J0MFT Datasheet - Page 140
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S9S12P64J0MFT
Manufacturer Part Number
S9S12P64J0MFT
Description
MCU 64K FLASH AUTO 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.S9S12P32J0MFT.pdf
(566 pages)
Specifications of S9S12P64J0MFT
Core Processor
HCS12
Core Size
16-Bit
Speed
32MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Processor Series
S12P
Core
HCS12
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, DEMO9S12PFAME
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Background Debug Module (S12SBDMV1)
enabled just for the READ_BD and WRITE_BD access cycle. This allows the BDM to access BDM
locations unobtrusively, even if the addresses conflict with the application memory map.
5.4.4
BDM firmware commands are used to access and manipulate CPU resources. The system must be in active
BDM to execute standard BDM firmware commands, see
Normal instruction execution is suspended while the CPU executes the firmware located in the standard
BDM firmware lookup table. The hardware command BACKGROUND is the usual way to activate BDM.
As the system enters active BDM, the standard BDM firmware lookup table and BDM registers become
visible in the on-chip memory map at 0x3_FF00–0x3_FFFF, and the CPU begins executing the standard
BDM firmware. The standard BDM firmware watches for serial commands and executes them as they are
received.
The firmware commands are shown in
140
BACKGROUND
ACK_ENABLE
ACK_DISABLE
READ_BD_BYTE
READ_BD_WORD
READ_BYTE
READ_WORD
WRITE_BD_BYTE
WRITE_BD_WORD
WRITE_BYTE
WRITE_WORD
NOTE:
If enabled, ACK will occur when data is ready for transmission for all BDM READ commands and will occur after the write is
complete for all BDM WRITE commands.
Command
Standard BDM Firmware Commands
Opcode
(hex)
CC
EC
D5
D6
E4
E0
E8
C4
C0
C8
90
16-bit data out
16-bit data out
16-bit data out
16-bit data out
16-bit address
16-bit address
16-bit address
16-bit address
16-bit address
16-bit address
16-bit address
16-bit address
16-bit data in
16-bit data in
16-bit data in
16-bit data in
None
None
None
Data
S12P-Family Reference Manual, Rev. 1.13
Table 5-4. Hardware Commands
Table
Enter background mode if BDM is enabled. If enabled, an ACK will be issued
when the part enters active background mode.
Enable Handshake. Issues an ACK pulse after the command is executed.
Disable Handshake. This command does not issue an ACK pulse.
Read from memory with standard BDM firmware lookup table in map.
Odd address data on low byte; even address data on high byte.
Read from memory with standard BDM firmware lookup table in map.
Must be aligned access.
Read from memory with standard BDM firmware lookup table out of map.
Odd address data on low byte; even address data on high byte.
Read from memory with standard BDM firmware lookup table out of map.
Must be aligned access.
Write to memory with standard BDM firmware lookup table in map.
Odd address data on low byte; even address data on high byte.
Write to memory with standard BDM firmware lookup table in map.
Must be aligned access.
Write to memory with standard BDM firmware lookup table out of map.
Odd address data on low byte; even address data on high byte.
Write to memory with standard BDM firmware lookup table out of map.
Must be aligned access.
5-5.
Section 5.4.2, “Enabling and Activating
Description
Freescale Semiconductor
BDM”.
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