S9S12P64J0MFT Freescale Semiconductor, S9S12P64J0MFT Datasheet - Page 77

• Manufacturer Part Number: S9S12P64J0MFT
• Description: MCU 64K FLASH AUTO 48-QFN
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12P64J0MFT

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-QFN Exposed Pad
• Processor Series: S12P
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: KIT33812ECUEVME, DEMO9S12PFAME
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1. Read: Anytime The data source is depending on the data direction value.
2.3.24
2.3.25
Freescale Semiconductor
Function
Address 0x0248
Address 0x0249
Write: Anytime
Altern.
Field
Reset
PTS
PTS
PTS
Reset
3-2
1
0
W
W
R
R
Port S general purpose input/output data—Data Register
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
Port S general purpose input/output data—Data Register, SCI TXD output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
Port S general purpose input/output data—Data Register, SCI RXD input
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
• The SCI function takes precedence over the general purpose I/O function if enabled.
• The SCI function takes precedence over the general purpose I/O function if enabled.
Port S Data Register (PTS)
Port S Input Register (PTIS)
—
0
0
0
u
7
7
= Unimplemented or Reserved
—
0
0
0
u
6
6
Table 2-21. PTS Register Field Descriptions
Figure 2-23. Port S Input Register (PTIS)
Figure 2-22. Port S Data Register (PTS)
S12P-Family Reference Manual, Rev. 1.13
—
5
0
0
5
0
u
—
0
0
0
u
4
4
Description
u = Unaffected by reset
PTIS3
PTS3
—
0
u
3
3
PTIS2
PTS2
—
0
u
2
2
Port Integration Module (S12PPIMV1)
Access: User read/write
PTIS1
PTS1
TXD
0
u
1
1
Access: User read
PTIS0
PTS0
RXD
0
u
0
0
77
(1)
(1)