S9S12P64J0MFT Freescale Semiconductor, S9S12P64J0MFT Datasheet - Page 206

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S9S12P64J0MFT

Manufacturer Part Number
S9S12P64J0MFT
Description
MCU 64K FLASH AUTO 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of S9S12P64J0MFT

Core Processor
HCS12
Core Size
16-Bit
Speed
32MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Processor Series
S12P
Core
HCS12
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, DEMO9S12PFAME
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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0
S12 Clock, Reset and Power Management Unit (S12CPMU)
7.3.2
This section describes all the S12CPMU registers and their individual bits.
Address order is as listed in
7.3.2.1
The CPMUSYNR register controls the multiplication factor of the PLL and selects the VCO frequency
range.
Read: Anytime
Write: If PROT=0 (CPMUPROT register) and PLLSEL=1 (CPMUCLKS register), then write anytime.
Else write has no effect.
The VCOFRQ[1:0] bits are used to configure the VCO gain for optimal stability and lock time. For correct
PLL operation the VCOFRQ[1:0] bits have to be selected according to the actual target VCOCLK
frequency as shown in
PLL (no locking and/or insufficient stability).
206
0x0034
Reset
W
If PLL has locked (LOCK=1)
R
Register Descriptions
S12CPMU Synthesizer Register (CPMUSYNR)
0
7
VCOFRQ[1:0]
Writing to this register clears the LOCK and UPOSC status bits.
f
frequency f
VCO
must be within the specified VCO frequency lock range. Bus
Table
Figure 7-4. S12CPMU Synthesizer Register (CPMUSYNR)
1
6
bus
Figure
7-1. Setting the VCOFRQ[1:0] bits incorrectly can result in a non functional
must not exceed the specified maximum.
Table 7-1. VCO Clock Frequency Selection
VCOCLK Frequency Ranges
32MHz <= f
48MHz < f
S12P-Family Reference Manual, Rev. 1.13
7-3.
0
5
Reserved
Reserved
f VCO
VCO
VCO
<= 64MHz
<= 48MHz
=
NOTE
NOTE
1
4
2 f REF
×
×
(
SYNDIV
1
3
VCOFRQ[1:0]
SYNDIV[5:0]
00
01
10
11
+
1
)
1
2
Freescale Semiconductor
1
1
1
0

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