S9S12P64J0MFT Freescale Semiconductor, S9S12P64J0MFT Datasheet - Page 548
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S9S12P64J0MFT
Manufacturer Part Number
S9S12P64J0MFT
Description
MCU 64K FLASH AUTO 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.S9S12P32J0MFT.pdf
(566 pages)
Specifications of S9S12P64J0MFT
Core Processor
HCS12
Core Size
16-Bit
Speed
32MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Processor Series
S12P
Core
HCS12
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, DEMO9S12PFAME
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Detailed Register Address Map
0x0020-0x002F Debug Module (S12SDBG) Map
1. This represents the contents if the Comparator A or C control register is blended into this address
2. This represents the contents if the Comparator B or D control register is blended into this address
3. This represents the contents if the Comparator B or D control register is blended into this address
0x0030-0x0033 Reserved
0x0034-0x003F Clock Reset and Power Management (CPMU) Map
548
Address
Address
Address
0x002C
0x002D
0x002A
0x002B
0x002E
0x002F
0x0028
0x0029
0x0030
0x0031
0x0032
0x0033
0x0034
0x0035 CPMUREFDIV
0x0036
0x0037
(3)
CPMUPOSTDI
CPMUSYNR
DBGADHM
DBGADLM
CPMUFLG
DBGCCTL
DBGXAM
DBGXAH
DBGADH
Reserved
Reserved
Reserved
Reserved
DBGADL
DBGXAL
Name
Name
Name
V
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Bit 15
Bit 15
Bit 15
RTIF
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
VCOFRQ[1:0]
REFFRQ[1:0]
0
0
0
0
0
0
0
S12P-Family Reference Manual, Rev. 1.13
PORF
Bit 6
Bit 6
Bit 6
14
14
14
0
0
6
6
0
0
0
0
0
6
LVRF
Bit 5
Bit 5
Bit 5
TAG
13
13
13
0
5
5
5
0
0
0
0
0
0
LOCKIF
Bit 4
Bit 4
Bit 4
BRK
12
12
12
0
4
4
4
0
0
0
0
0
LOCK
Bit 3
Bit 3
Bit 3
RW
11
11
11
0
3
3
3
0
0
0
0
SYNDIV[5:0]
POSTDIV[4:0]
RWE
Bit 2
Bit 2
Bit 2
ILAF
10
10
10
0
2
2
2
0
0
0
0
REFDIV[3:0]
Freescale Semiconductor
OSCIF
Bit 1
Bit 1
Bit 1
17
0
9
1
9
1
9
1
0
0
0
0
COMPE
UPOSC
Bit 16
Bit 0
Bit 0
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
0
0
0
0
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