MCHC908GR8CFAE Freescale Semiconductor, MCHC908GR8CFAE Datasheet - Page 181

IC MCU FLSH 8BIT8MHZ 7.5K32-LQFP

MCHC908GR8CFAE

Manufacturer Part Number
MCHC908GR8CFAE
Description
IC MCU FLSH 8BIT8MHZ 7.5K32-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheets

Specifications of MCHC908GR8CFAE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
21
Program Memory Size
7.5KB (7.5K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Controller Family/series
HC08
No. Of I/o's
21
Ram Memory Size
384Byte
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08G
Core
HC08
Data Bus Width
8 bit
Data Ram Size
384 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8.2 MHz
Number Of Programmable I/os
21
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 6 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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15.2 SIM Bus Clock Control and Generation
The bus clock generator provides system clock signals for the CPU and peripherals on the MCU. The
system clocks are generated from an incoming clock, CGMOUT, as shown in
originates from either an external oscillator or from the internal clock generator.
15.2.1 Bus Timing
In user mode, the internal bus frequency is the internal clock generator output (CGMXCLK) divided by
four.
Freescale Semiconductor
Addr.
$FE03
$FE04
$FE05
$FE06
GENERATOR
Register Name
SIM Break Flag Control
ICG
Register (SBFCR)
Register 1 (INT1)
Register 2 (INT2)
Register 3 (INT3)
Interrupt Status
Interrupt Status
Interrupt Status
See page 195.
See page 189.
See page 190.
See page 190.
ECLK
ICLK
MC68HC908GT16 • MC68HC908GT8 • MC68HC08GT16 Data Sheet, Rev. 5.0
Figure 15-2. SIM I/O Register Summary (Continued)
CIRCUIT
SELECT
CLOCK
CS
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
ICG
MONITOR MODE
Figure 15-3. System Clock Signals
USER MODE
BCFE
Bit 7
IF14
IF6
R
R
R
0
0
0
0
0
÷ 2
= Unimplemented
IF13
IF5
R
R
R
R
6
0
0
0
0
A
B S*
*WHEN S = 1,
CGMOUT = B
IF12
IF4
5
R
R
R
R
0
0
0
0
CGMXCLK
CGMOUT
COPCLK
TBMCLK
IF11
IF3
4
R
R
R
R
R
0
0
0
0
= Reserved
SIM Bus Clock Control and Generation
IF10
IF2
3
R
R
R
R
0
0
0
0
COP PRESCALER
TBM PRESCALER
÷ 2
SIM COUNTER
SIM
Figure
IF1
IF9
2
R
R
R
R
0
0
0
0
GENERATORS
BUS CLOCK
15-3. This clock
IF16
IF8
1
R
R
R
R
0
0
0
0
Bit 0
IF15
IF7
R
R
R
R
0
0
0
0
181

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