MCHC908GR8CFAE Freescale Semiconductor, MCHC908GR8CFAE Datasheet - Page 221

• Manufacturer Part Number: MCHC908GR8CFAE
• Description: IC MCU FLSH 8BIT8MHZ 7.5K32-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MCHC908GR8CFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 21
• Program Memory Size: 7.5KB (7.5K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Controller Family/series: HC08
• No. Of I/o's: 21
• Ram Memory Size: 384Byte
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC08G
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 384 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8.2 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 3
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 6 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Chapter 18
Timer Interface Module (TIM)
18.1 Introduction
This section describes the timer interface (TIM) module. The TIM is a two-channel timer that provides a
timing reference with input capture, output compare, and pulse-width-modulation functions.
is a block diagram of the TIM.
This particular MCU has two timer interface modules which are denoted as TIM1 and TIM2.
Freescale Semiconductor
BUS CLOCK
INTERNAL
TSTOP
TRST
16-BIT COMPARATOR
16-BIT COMPARATOR
16-BIT COMPARATOR
16-BIT COUNTER
TMODH:TMODL
TCH0H:TCH0L
TCH1H:TCH1L
16-BIT LATCH
16-BIT LATCH
CHANNEL 0
CHANNEL 1
MC68HC908GT16 • MC68HC908GT8 • MC68HC08GT16 Data Sheet, Rev. 5.0
PRESCALER
Figure 18-1. TIM Block Diagram
ELS0B
ELS1B
MS0A
MS1A
PS2
ELS0A
ELS1A
PRESCALER SELECT
PS1
MS0B
CH0F
CH1F
PS0
CH0MAX
CH1MAX
CH0IE
CH1IE
TOV0
TOV1
TOIE
TOF
INTERRUPT
INTERRUPT
INTERRUPT
LOGIC
LOGIC
LOGIC
LOGIC
LOGIC
PORT
PORT
Figure 18-1
T[1,2]CH0
T[1,2]CH1
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