R5F2L3A7ANFP#U1 Renesas Electronics America, R5F2L3A7ANFP#U1 Datasheet - Page 218
R5F2L3A7ANFP#U1
Manufacturer Part Number
R5F2L3A7ANFP#U1
Description
MCU FLASH 48+4KB 64LQFP
Manufacturer
Renesas Electronics America
Series
R8C/Lx/3AAr
Datasheet
1.R5F2L387ANFPU1.pdf
(864 pages)
Specifications of R5F2L3A7ANFP#U1
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LCD, POR, PWM, Voltage Detect, WDT
Number Of I /o
88
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 20x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 181 of 802
12. ID Code Areas
The ID code areas are used to implement a function that prevents the flash memory from being rewritten in standard
serial I/O mode. This function prevents the flash memory from being read, rewritten, or erased.
12.1
Figure 12.1
The ID code areas are assigned to 0FFDFh, 0FFE3h, 0FFEBh, 0FFEFh, 0FFF3h, 0FFF7h, and 0FFFBh of the
respective vector highest-order addresses of the fixed vector table. Figure 12.1 shows the ID Code Areas.
Introduction
ID Code Areas
0FFDFh to 0FFDCh
0FFE3h to 0FFE0h
0FFE7h to 0FFE4h
0FFEBh to 0FFE8h
0FFEFh to 0FFECh
0FFF3h to 0FFF0h
0FFF7h to 0FFF4h
0FFFBh to 0FFF8h
0FFFFh to 0FFFCh
Address
Oct 30, 2009
ID code areas
OFS
ID1
ID2
ID3
ID4
ID5
ID6
ID7
Watchdog timer, oscillation stop detection
Undefined instruction vector
Overflow vector
BRK instruction vector
Address match vector
Single step vector
Address break vector
Reset vector
4 bytes
(Reserved)
12. ID Code Areas
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