R5F2L3A7ANFP#U1 Renesas Electronics America, R5F2L3A7ANFP#U1 Datasheet - Page 496
R5F2L3A7ANFP#U1
Manufacturer Part Number
R5F2L3A7ANFP#U1
Description
MCU FLASH 48+4KB 64LQFP
Manufacturer
Renesas Electronics America
Series
R8C/Lx/3AAr
Datasheet
1.R5F2L387ANFPU1.pdf
(864 pages)
Specifications of R5F2L3A7ANFP#U1
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LCD, POR, PWM, Voltage Detect, WDT
Number Of I /o
88
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 20x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 459 of 802
22.4
Table 22.6
j = A or B
Count sources
Count operation
Count period
Count start condition
Count stop condition
Interrupt request generation
timing
TRGIOA/TRGIOB
pins function
TRGCLKA/TRGCLKB
pins function
Read from timer
Write to timer
Selectable functions
The value of the TRG register can be transferred to the TRGGRA or TRGGRB register when the input edge of the
input capture/output compare pin (TRGIOA or TRGIOB) is detected. The detection edge can be selected from the
rising edge, falling edge, or both edges.
The input capture function can be used for measuring pulse widths and periods.
Table 22.6 lists the Input Capture Function Specifications.
Timer Mode (Input Capture Function)
Item
Input Capture Function Specifications
Oct 30, 2009
f1, f4, f8, f32, or
1 (count starts) is written to the TSTART bit in the TRGMR register.
The count value can be read by reading the TRG register.
The TRG register can be written to.
external signal input to the TRGCLKj pin (active edge selectable by a
program)
Increment
When bits CCLR1 to CCLR0 in the TRGCR register are set to 00b
(free-running operation)
1/fk × 65,536 fk: Frequency of count source
0 (count stops) is written to the TSTART bit in the TRGMR register.
• Input capture (active edge of the TRGIOj input)
• TRG register overflow
Programmable I/O port or input-capture input
(selectable for each individual pin)
Programmable I/O port or external clock input
• Input-capture input pin selection
• Active edge selection for input-capture input
• Timing for setting the TRG register to 0000h
• Buffer operation (Refer to 22.3.2 Buffer Operation .)
• Digital filter (Refer to 22.3.3 Digital Filter .)
Either one or both of pins TRGIOA and TRGIOB
Rising edge, falling edge, or both rising and falling edges
Overflow or input capture
Specification
22. Timer RG
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