R5F2L3A7ANFP#U1 Renesas Electronics America, R5F2L3A7ANFP#U1 Datasheet - Page 662
R5F2L3A7ANFP#U1
Manufacturer Part Number
R5F2L3A7ANFP#U1
Description
MCU FLASH 48+4KB 64LQFP
Manufacturer
Renesas Electronics America
Series
R8C/Lx/3AAr
Datasheet
1.R5F2L387ANFPU1.pdf
(864 pages)
Specifications of R5F2L3A7ANFP#U1
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LCD, POR, PWM, Voltage Detect, WDT
Number Of I /o
88
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 20x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 625 of 802
Figure 28.9
28.4.3
LINCR register
TRAIC register
BCDCT flag in
LINST register
Transfer clock
U0C1 register
LINE bit in
RXD0 pin
TXD0 pin
The bus collision detection function can be used when UART0 is enabled for transmission (TE bit in U0C1
register = 1). To detect a bus collision during Synch Break transmission, set the BCE bit in the LINCR2 register
to 1 (bus collision detection enabled).
Figure 28.9 shows an Operating Example When Bus Collision is Detected.
TE bit in
IR bit in
Bus Collision Detection Function
1
0
1
0
1
0
1
0
1
0
1
0
1
0
Operating Example When Bus Collision is Detected
Set to 1 by a program.
Set to 1 by a program.
Oct 30, 2009
Set to 0 when an interrupt request is acknowledged
or by a program.
1 is written to the B2CLR bit in the LINST register.
28. Hardware LIN
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