R5F2L3A7ANFP#U1 Renesas Electronics America, R5F2L3A7ANFP#U1 Datasheet - Page 220
R5F2L3A7ANFP#U1
Manufacturer Part Number
R5F2L3A7ANFP#U1
Description
MCU FLASH 48+4KB 64LQFP
Manufacturer
Renesas Electronics America
Series
R8C/Lx/3AAr
Datasheet
1.R5F2L387ANFPU1.pdf
(864 pages)
Specifications of R5F2L3A7ANFP#U1
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LCD, POR, PWM, Voltage Detect, WDT
Number Of I /o
88
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 20x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 183 of 802
12.3
12.4
Table 12.2
Note:
ALeRASE
Other than ALeRASE ALeRASE
This function is used in standard serial I/O mode. When the ID codes sent from the serial programmer or the on-
chip debugging emulator are “ALeRASE” in ASCII code, the content of the user ROM area will be erased at once.
However, if the contents of the ID code addresses are set to other than “ALeRASE” (other than Table 12.1 ID
Code Reserved Word) when the ROMCR bit in the OFS register is set to 1 and the ROMCP1 bit is set to 0 (ROM
code protect enabled), forced erasure is not executed and the ID codes are checked with the ID code check function.
Table 12.2 lists the Conditions and Operations of Forced Erase Function.
When the contents of the ID code addresses are set to “ALeRASE” in ASCII code, if the ID codes sent from the
serial programmer or the on-chip debugging emulator are “ALeRASE”, the content of the user ROM area will be
erased. If the ID codes sent from the serial programmer are other than “ALeRASE”, the ID codes do not match and
no command is acknowledged, thus the user ROM area remains protected.
This function is used in standard serial I/O mode. When the I/D codes in the ID code storage addresses are set to the
reserved character sequence of the ASCII codes “Protect” (refer to Table 12.1 ID Code Reserved Word),
communication with the serial programmer or the on-chip debugging emulator is not performed. This does not
allow the flash memory to be read, rewritten, or erased using the serial programmer or the on-chip debugging
emulator.
Also, if the ID codes are also set to the reserved character sequence of the ASCII codes “Protect” when the
ROMCR bit in the OFS register is set to 1 and the ROMCP1 bit is set to 0 (ROM code protect enabled), ROM code
protection cannot be disabled using the serial programmer or the on-chip debugging emulator. This prevents the
flash memory from being read, rewritten, or erased using the serial programmer, the on-chip debugging emulator,
or the parallel programmer.
ID code from serial
on-chip debugging
1. For “Protect”, refer to 12.4 Standard Serial I/O Mode Disabled Function .
programmer or
emulator
Forced Erase Function
Standard Serial I/O Mode Disabled Function
Conditions and Operations of Forced Erase Function
ALeRASE
Other than ALeRASE
Other than ALeRASE
ID code storage
Oct 30, 2009
ID code in
address
Condition
(1)
(1)
–
Other than 01b
(ROM code protect disabled)
01b
(ROM code protect enabled)
–
–
ROMCP1 and ROMCR
in OFS register
Bits
All erasure of user ROM
area (forced erase function)
ID code check
(ID code check function)
ID code check
(ID code check function.
No ID code match)
ID code check
(ID code check function)
Operation
12. ID Code Areas
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