R5F21217JFP#U1 Renesas Electronics America, R5F21217JFP#U1 Datasheet - Page 132
![MCU FLASH 48K 2.5K CMOS 48LQFP](/photos/28/61/286102/48-lqfp__plqp0048kb-a_sml.jpg)
R5F21217JFP#U1
Manufacturer Part Number
R5F21217JFP#U1
Description
MCU FLASH 48K 2.5K CMOS 48LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/21r
Datasheet
1.R5F21216JFP.pdf
(503 pages)
Specifications of R5F21217JFP#U1
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F21217JFP#U1R5F21217JFP
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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R8C/20 Group, R8C/21 Group
Rev.2.00 Aug 27, 2008
REJ09B0250-0200
Figure 13.2
Option Function Select Register
Watchdog Timer Control Register
b7 b6 b5 b4 b3 b2 b1 b0
NOTES:
b7 b6 b5 b4
1.
2.
3.
0 0
1 1
The OFS register is on the flash memory. Write to the OFS register w ith a program. After w riting is completed, do not
w rite additions to the OFS register.
To use the pow er-on reset, set the LVD1ON bit to 0 (voltage monitor 1 reset enabled after reset).
If the block including the OFS register is erased, FFh is set to the OFS register.
b3 b2 b1 b0
Registers OFS and WDC
1
Bit Symbol
Bit Symbol
CSPROINI
ROMCP1
LVD1ON
WDTON
ROMCR
(b5-b4)
(b4-b0)
Symbol
Symbol
WDC7
WDC
Page 114 of 458
OFS
(b1)
(b5)
(b6)
—
—
—
—
—
Watchdog timer start
select bit
Reserved bit
ROM code protect
disabled bit
ROM code protect bit
Reserved bits
Voltage detection circuit
start bit
Count source protect
mode after reset select
bit
High-order bits of w atchdog timer
Reserved bits
Reserved bits
Prescaler select bit
(1)
(2)
Address
Bit Name
Address
Bit Name
0FFFFh
000Fh
0 : Starts w atchdog timer automatically after reset
1 : Watchdog timer is inactive after reset
Set to 1
0 : ROM code protect disabled
1 : ROMCP1 enabled
0 : ROM code protect enabled
1 : ROM code protect disabled
Set to 1
0 : Voltage monitor 1 reset enabled after reset
1 : Voltage monitor 1 reset disabled after reset
0 : Count source protect mode enabled after reset
1 : Count source protect mode disabled after reset
Set to 0.
When read, the content is undefined.
Set to 0
0 : Divide-by-16
1 : Divide-by-128
Before Shipment
After Reset
00X11111b
Function
Function
FFh
(3)
13. Watchdog Timer
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RO
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