R5F21217JFP#U1 Renesas Electronics America, R5F21217JFP#U1 Datasheet - Page 488
![MCU FLASH 48K 2.5K CMOS 48LQFP](/photos/28/61/286102/48-lqfp__plqp0048kb-a_sml.jpg)
R5F21217JFP#U1
Manufacturer Part Number
R5F21217JFP#U1
Description
MCU FLASH 48K 2.5K CMOS 48LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/21r
Datasheet
1.R5F21216JFP.pdf
(503 pages)
Specifications of R5F21217JFP#U1
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F21217JFP#U1R5F21217JFP
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 488 of 503
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Rev.
0.20
1.00
REVISION HISTORY
Nov 15, 2006 All pages “Preliminary” and “Under development” deleted
Jun 28, 2006
Date
Page
424
430
431
435
445
446
447
448
13
14
15
22
2
3
5
6
21. Usage Notes;
21.1.1 Stop Mode and Wait Mode revised.
21.1.3 Oscillation Circuit Constants revised.
21.3.3.1 TRDSTR Register (i = 0 or 1) added.
21.3.3.6 Reset Synchronous PWM Mode;
21.3.3.7 Complementary PWM Mode;
On the 3rd line from the bottom;
21.3.3.7 PWM3 Mode deleted.
21.3.3.8 Count Source fOCO40M added.
22. Notes on On-Chip Debugger;
Appendix 1. Package Dimensions;
Appendix Figure 2.1 Connection Example with M16C Flash Starter (M3A-0806);
Appendix Figure 3.1 Example of Oscillation Evaluation Circuit revised.
Table 1.1 Functions and Specifications for R8C/20 Group revised.
Table 1.2 Functions and Specifications for R8C/21 Group revised.
Table 1.3 Product Information for R8C/20 Group;
Figure 1.2 Type Number, Memory Size, and Package of R8C/20 Group;
Table 1.4 Product Information for R8C/21 Group;
Figure 1.3 Type Number, Memory Size, and Package of R8C/21 Group;
Figure 3.1 Memory Map of R8C/20 Group revised.
Figure 3.2 Memory Map of R8C/21 Group revised.
Table 4.1 SFR Information (1)
bit in the OFS register is 0.” revised.
Table 5.2 Title of Table revised
NOTE1 deleted.
“R5F2120AJFP (D)”, “R5F2120CJFP (D)”, “R5F2120AKFP (D)”,
“R5F2120CKFP (D)”, and NOTE added.
“A: 96 KB” and “C: 128 KB” added.
“R5F2121AJFP (D)”, “R5F2121CJFP (D)”, “R5F2121AKFP (D)”,
“R5F2121CKFP (D)”, and NOTE added.
“A: 96 KB” and “C: 128 KB” added.
NOTE8; “The CSPROINI bit in the OFS register is set to 0.” → “The CSPROINI
NOTE1 deleted.
R8C/20 Group, R8C/21 Group Hardware Manual
“21. Precautions” → “21. Usage Notes” revised.
(2) revised.
(2) revised.
“However, to write data ~ to 1 (buffer register).” added.
“22. Precaution for On-chip Debugger” → “22. Notes on On-Chip
Debugger” revised.
(2) and (3) added.
“Diagrams shows ~ website.” added.
NOTES revised.
C - 12
Description
(1)
;
Summary
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