R5F21217JFP#U1 Renesas Electronics America, R5F21217JFP#U1 Datasheet - Page 466
![MCU FLASH 48K 2.5K CMOS 48LQFP](/photos/28/61/286102/48-lqfp__plqp0048kb-a_sml.jpg)
R5F21217JFP#U1
Manufacturer Part Number
R5F21217JFP#U1
Description
MCU FLASH 48K 2.5K CMOS 48LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/21r
Datasheet
1.R5F21216JFP.pdf
(503 pages)
Specifications of R5F21217JFP#U1
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F21217JFP#U1R5F21217JFP
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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R8C/20 Group, R8C/21 Group
Rev.2.00 Aug 27, 2008
REJ09B0250-0200
21.8
21.8.1
Table 21.2
NOTES:
Mode
EW0 During automatic erasing Any interrupt can be used
21.8.1.1
21.8.1.2
21.8.1.3
1. Do not use the address match interrupt while the command is executed because the vector of the
2. Do not use the non-maskable interrupt while block 0 is automatically erased because the fixed
Before entering CPU rewrite mode (EW0 mode), select 5 MHz or below for the CPU clock using the CM06 bit
in the CM0 register and the CM16 to CM17 bits in the CM1 register. This usage note is not needed for EW1
mode.
The following instructions cannot be used in EW0 mode because the flash memory internal data is referenced:
UND, INTO, and BRK instructions.
Table 21.2 lists the EW0 Mode Interrupts and Table 21.3 lists the EW1 Mode Interrupts.
address match interrupt is allocated on ROM.
vector is allocated block 0.
Notes on Flash Memory
Automatic writing
CPU Rewrite Mode
Operating Speed
Prohibited Instructions
EW0 Mode Interrupts
Interrupts
Status
Page 448 of 458
by allocating a vector to
RAM
When Maskable Interrupt
Acknowledged
Request is
Once an interrupt request is acknowledged,
the auto-programming or auto-erasing is
forcibly stopped immediately and resets the
flash memory. An interrupt process starts
after the fixed period and the flash memory
restarts. Since the block during the auto-
erasing or the address during the auto-
programming is forcibly stopped, the
normal value may not be read. Execute the
auto-erasing again and ensure the auto-
erasing is completed normally.
Since the watchdog timer does not stop
during the command operation, the
interrupt request may be generated. Reset
the watchdog timer regularly.
Detection and Voltage Monitor 2 Interrupt
When Watchdog Timer, Oscillation Stop
Request are Acknowledged
21. Usage Notes
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