R5F21217JFP#U1 Renesas Electronics America, R5F21217JFP#U1 Datasheet - Page 282
![MCU FLASH 48K 2.5K CMOS 48LQFP](/photos/28/61/286102/48-lqfp__plqp0048kb-a_sml.jpg)
R5F21217JFP#U1
Manufacturer Part Number
R5F21217JFP#U1
Description
MCU FLASH 48K 2.5K CMOS 48LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/21r
Datasheet
1.R5F21216JFP.pdf
(503 pages)
Specifications of R5F21217JFP#U1
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F21217JFP#U1R5F21217JFP
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 282 of 503
- Download datasheet (6Mb)
R8C/20 Group, R8C/21 Group
Rev.2.00 Aug 27, 2008
REJ09B0250-0200
14.4.2
14.4.2.1
14.4.2.2
Timer RE has the TSTART bit for instructing count start or stop, and the TCSTF bit which indicates count start
or stop. The TSTART and TCSTF bits are in the TRECR1 register.
Timer RE starts counting when setting the TSTART bit to 1 (count starts) and the TCSTF bit is set to 1 (count
starts). It takes the time for up to 2 cycles of the count source until the TCSTF bit is set to 1 after setting the
TSTART bit to 1. During this time, do not access registers associated with Timer RE
bit.
Also, timer RE stops counting when setting the TSTART bit to 0 (count stops) and the TCSTF bit is set to 0
(count stops). It takes the time for up to 2 cycles of the count source until the TCSTF bit is set to 0 after setting
the TSTART bit to 0. During this time, do not access registers associated with timer RE other than the TCSTF
bit.
NOTE:
Write to the following registers or bits while timer RE stops.
• TRESEC and TRECR2 registers
• The INT bit in TRECR1 register
• RCS0 to RCS2 bits in TRECSR register
The state while Timer RE stops is indicated as the state where the TSTART and TCSTF bits in the TRECR1
register are set to 0 (timer RE stops).
Also, set all above-mentioned registers and bits (immediately before timer RE count starts) before setting the
TRECR2 register.
1. Registers associated with Timer RE:TRESEC, TREMIN, TRECR1, TRECR2, TRECSR
Notes on Timer RE
Starting and Stopping Count
Register Setting
Page 264 of 458
(1)
other than the TCSTF
14. Timers
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