MC9S12XA512CAG Freescale Semiconductor, MC9S12XA512CAG Datasheet - Page 160
![IC MCU 512K FLASH 144-LQFP](/photos/12/38/123875/mc9s12xa512cag_sml.jpg)
MC9S12XA512CAG
Manufacturer Part Number
MC9S12XA512CAG
Description
IC MCU 512K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Specifications of MC9S12XA512CAG
Core Processor
HCS12X
Core Size
16-Bit
Speed
80MHz
Connectivity
EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
119
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
S12XA
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
32 KB
Interface Type
CAN, I2C, SCI, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
119
Number Of Timers
12
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
EVB9S12XDP512E
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 24 Channel)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S12XA512CAG
Manufacturer:
Freescale
Quantity:
490
Company:
Part Number:
MC9S12XA512CAG
Manufacturer:
Freescale Semiconductor
Quantity:
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Chapter 5 Analog-to-Digital Converter (S12ATD10B8CV2)
5.1.2.2
5.1.3
Figure 5-1
5.2
This section lists all inputs to the ATD block.
5.2.1
This pin serves as the analog input channel x. It can also be configured as general purpose digital port pin
and/or external trigger for the ATD conversion.
5.2.2
These inputs can be configured to serve as an external trigger for the ATD conversion.
Refer to the device overview chapter for availability and connectivity of these inputs.
5.2.3
V
5.2.4
These pins are the power supplies for the analog circuitry of the ATD block.
160
RH
•
•
•
is the high reference voltage and V
Stop mode
Entering stop mode causes all clocks to halt and thus the system is placed in a minimum power
standby mode. This aborts any conversion sequence in progress. During recovery from stop mode,
there must be a minimum delay for the stop recovery time t
conversion sequence.
Wait mode
Entering wait mode the ATD conversion either continues or aborts for low power depending on the
logical value of the AWAIT bit.
Freeze mode
In freeze mode the ATD will behave according to the logical values of the FRZ1 and FRZ0 bits.
This is useful for debugging and emulation.
External Signal Description
shows a block diagram of the ATD.
Block Diagram
ANx (x = 7, 6, 5, 4, 3, 2, 1, 0) — Analog Input Pin
ETRIG3, ETRIG2, ETRIG1, and ETRIG0 — External Trigger Pins
V
V
MCU Operating Modes
RH
DDA
and V
and V
RL
SSA
— High and Low Reference Voltage Pins
— Power Supply Pins
MC9S12XDP512 Data Sheet, Rev. 2.21
RL
is the low reference voltage for ATD conversion.
SR
before initiating a new ATD
Freescale Semiconductor
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