MC9S12XA512CAG Freescale Semiconductor, MC9S12XA512CAG Datasheet - Page 853
![IC MCU 512K FLASH 144-LQFP](/photos/12/38/123875/mc9s12xa512cag_sml.jpg)
MC9S12XA512CAG
Manufacturer Part Number
MC9S12XA512CAG
Description
IC MCU 512K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Specifications of MC9S12XA512CAG
Core Processor
HCS12X
Core Size
16-Bit
Speed
80MHz
Connectivity
EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
119
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
S12XA
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
32 KB
Interface Type
CAN, I2C, SCI, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
119
Number Of Timers
12
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
EVB9S12XDP512E
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 24 Channel)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S12XA512CAG
Manufacturer:
Freescale
Quantity:
490
Company:
Part Number:
MC9S12XA512CAG
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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22.3.2.38 Port P Data Register (PTP)
Read: Anytime.
Write: Anytime.
Port P pins 7, and 5–0 are associated with the PWM as well as the SPI1 and SPI2 modules. These pins can
be used as general purpose I/O when not used with any of the peripherals.
If the data direction bits of the associated I/O pins are set to logic level “1”, a read returns the value of the
port register, otherwise the buffered pin input state is read.
The PWM function takes precedence over the general purpose I/O and the SPI2 or SPI1 function if the
associated PWM channel is enabled. While channels 6 and 5-0 are output only if the respective channel is
enabled, channel 7 can be PWM output or input if the shutdown feature is enabled. Refer to PWM section
for details.
The SPI2 function takes precedence over the general purpose I/O function if enabled. Refer to SPI section
for details.
The SPI1 function takes precedence over the general purpose I/O function if enabled. Refer to SPI section
for details.
Freescale Semiconductor
Reset
PWM
SPI
W
R
PWM7
SCK2
PTP7
0
7
PWM6
PTP6
SS2
0
6
Figure 22-40. Port P Data Register (PTP)
MOSI2
MC9S12XDP512 Data Sheet, Rev. 2.21
PWM5
PTP5
0
5
MISO2
PWM4
PTP4
0
4
Chapter 22 DP512 Port Integration Module (S12XDP512PIMV2)
PWM3
PTP3
SS1
0
3
PWM2
SCK1
PTP2
0
2
MOSI1
PWM1
PTP1
0
1
MISO1
PWM0
PTP0
0
0
855
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