MC9S12XDT256MAG Freescale Semiconductor, MC9S12XDT256MAG Datasheet - Page 641
![IC MCU 256K FLASH 144-LQFP](/photos/12/39/123909/mc9s12xdt256mag_sml.jpg)
MC9S12XDT256MAG
Manufacturer Part Number
MC9S12XDT256MAG
Description
IC MCU 256K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.MC9S12XD64CAA.pdf
(1348 pages)
Specifications of MC9S12XDT256MAG
Core Processor
HCS12X
Core Size
16-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
119
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
144-LQFP
Processor Series
S12XD
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
119
Number Of Timers
12
Operating Supply Voltage
0 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
EVB9S12XDP512E
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (24-ch x 10-bit)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S12XDT256MAG
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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The following conditions must be satisfied to ensure correct operation of the RAM protection mechanism:
Freescale Semiconductor
•
•
Value stored in RAMXGU must be lower than the value stored in RAMSHL.
Value stored RAMSHL must be lower or equal than the value stored in RAMSHU.
$0F_RAMXGU_FF
$0F_RAMSHU_FF
$0F_RAMSHL_00
CPU access violation
$0F_FFFF
Interrupt Source
Table 17-21. RAM Write Protection Interrupt Vectors
Figure 17-25. RAM Write Protection Scheme
$00_0000
$00_0800
MC9S12XDP512 Data Sheet, Rev. 2.21
Shared Region
Unimplemented
XGATE RAM
Region
2K Registers
CCR Mask
I Bit
Chapter 17 Memory Mapping Control (S12XMMCV2)
Only XGATE is allowed to write
Only CPU is allowed to write
CPU and XGATE are allowed to write
Only CPU is allowed to write
AVIE in RAMWPC
Local Enable
641
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