MC9S12XDT256MAG Freescale Semiconductor, MC9S12XDT256MAG Datasheet - Page 876

• Manufacturer Part Number: MC9S12XDT256MAG
• Description: IC MCU 256K FLASH 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12XDT256MAG

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 80MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 119
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-LQFP
• Processor Series: S12XD
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: CAN/I2C/SCI/SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 119
• Number Of Timers: 12
• Operating Supply Voltage: 0 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: EVB9S12XDP512E
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (24-ch x 10-bit)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 22 DP512 Port Integration Module (S12XDP512PIMV2)
22.3.2.69 Port AD1 Data Direction Register 1 (DDR1AD1)
Read: Anytime.
Write: Anytime.
This register configures pins PAD[15:08] as either input or output.
878
DDR1AD1[15:8]
Reset
Field
W
R
7–0
DDR1AD115 DDR1AD114 DDR1AD113 DDR1AD112 DDR1AD111 DDR1AD110 DDR1AD19
0
7
Data Direction Port AD1 Register 1
0 Associated pin is configured as input.
1 Associated pin is configured as output.
Note: Due to internal synchronization circuits, it can take up to 2 bus clock cycles until the correct value is
Note: To use the digital input function on port AD1 the ATD1 digital input enable register (ATD1DIEN1) has
read on PTAD11 register, when changing the DDR1AD1 register.
to be set to logic level “1”.
Figure 22-71. Port AD1 Data Direction Register 1 (DDR1AD1)
0
6
Table 22-62. DDR1AD1 Field Descriptions
MC9S12XDP512 Data Sheet, Rev. 2.21
0
5
0
4
Description
0
3
0
2
Freescale Semiconductor
0
1
DDR1AD18
0
0