M30280FAHP#D5 Renesas Electronics America, M30280FAHP#D5 Datasheet - Page 112

• Manufacturer Part Number: M30280FAHP#D5
• Description: IC M16C MCU FLASH 96K 80-LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/Tiny/28r

Specifications of M30280FAHP#D5

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 71
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 80-LQFP
• For Use With: M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: M30280FAHP#D5A

M
R
R
e
E
1
. v
6
J
Figure 11.2 DM0SL Register
0
C
2
9
2 /
0 .
NOTES:
B
DSEL3 to DSEL0 DMS=0(basic cause of request)
0 0 0 0
0 0 0 1
0 0 1 0
0 0 1 1
0 1 0 0
0 1 0 1
0 1 1 0
0 1 1 1
1 0 0 0
1 0 0 1
1 0 1 0
1 0 1 1
1 1 0 0
1 1 0 1
1 1 1 0
1 1 1 1
DMA0 Request Cause Select Register
b7
0
8
0
0
1. The causes of DMA0 requests can be selected by a combination of DMS bit and DSEL3 to DSEL0 bits in the
G
4
b6
J
manner described below.
7
a
o r
0 -
. n
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
b5
u
2
3
p
0
, 1
b4
0
(
M
2
b3
0
1
0
6
7
b2
C
Falling edge of INT0 pin
Software trigger
Timer A0
Timer A1
Timer A2
Timer A3
Timer A4
Timer B0
Timer B1
Timer B2
UART0 transmit
UART0 receive
UART2 transmit
UART2 receive
A/D conversion
UART1 transmit
2 /
b1
, 8
page 90
b0
M
1
6
Bit Symbol
C
DSEL0
DSEL1
DSEL2
DSEL3
(b5-b4)
DMS
DSR
2 /
f o
Symbol
DM0SL
8
3
) B
8
5
DMA request cause
select bit
DMA request cause
expansion select bit
Software DMA
request bit
Nothing is assigned. When write, set to “0”.
When read, its content is “0”.
Bit Name
Address
03B8
DMS=1(extended cause of request)
IC/OC base timer
–
IC/OC channel 0
IC/OC channel 1
–
–
Two edges of INT0 pin
–
–
–
IC/OC channel 2
IC/OC channel 3
IC/OC channel 4
IC/OC channel 5
IC/OC channel 6
IC/OC channel 7
16
0: Basic cause of request
1: Extended cause of request
A DMA request is generated by
setting this bit to “1” when the DMS
bit is “0” (basic cause) and the
DSEL3 to DSEL0 bits are “0001
(software trigger).
The value of this bit when read is “0” .
Refer to note (1)
After Reset
Function
00
16
2
”
RW
RW
RW
RW
RW
RW
RW
11. DMAC