M30280FAHP#D5 Renesas Electronics America, M30280FAHP#D5 Datasheet - Page 142
![IC M16C MCU FLASH 96K 80-LQFP](/photos/12/40/124063/m30280fahp_d5_sml.jpg)
M30280FAHP#D5
Manufacturer Part Number
M30280FAHP#D5
Description
IC M16C MCU FLASH 96K 80-LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/28r
Datasheet
1.M30280F6HPU9.pdf
(425 pages)
Specifications of M30280FAHP#D5
Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, POR, PWM, Voltage Detect, WDT
Number Of I /o
71
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
80-LQFP
For Use With
M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
M30280FAHP#D5A
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M
R
R
1
e
E
6
Table 12.9 Specifications in A/D Trigger Mode
NOTES:
. v
J
C
12.2.4 A/D Trigger Mode
Count Source
Count Operation
Divide Ratio
Count Start Condition
Count Stop Condition
Interrupt Request
Generation Timing
TBiIN Pin Function
Read From Timer
Write To Timer
0
2
2 /
9
A/D trigger mode is used together with simultaneous sample sweep mode or delayed trigger mode 0 of
A/D conversion to start A/D conversion. It is used in timer B0 and timer B1 only. In this mode, the timer
starts counting by one trigger until the count value becomes 0000
register in A/D trigger mode and Figure 12.24 shows the TB2SC register.
1. A/D conversion is started by the timer underflow. For details refer to 15. A/D Converter.
2. When using in delayed trigger mode 0, set the larger value than the value of the timer B0 register
0 .
B
8
0
0
to the timer B1 register.
0
G
4
J
o r
7
a
0 -
. n
u
Item
p
2
3
0
, 1
(
0
M
2
1
(2)
0
6
0
C
7
2 /
, 8
page 120
M
1
6
f
• Decrement
• When the timer underflows, reload register contents are reloaded before
• When a trigger is generated during the count operation, the count is not
When the TBiS (i=0,1) bit in the TABSR register is "1"(count started), the
TBiEN (i=0,1) in TB2SC register is "1" (A/D trigger mode) and the following
trigger selected by the TB2SEL bit in the TB2SC register
is generated.
• Timer B2 interrupt
• Underflow of Timer B2 interrupt generation frequency counter setting
• After the count value is 0000
• Set the TBiS bit to "0"(count stopped)
Timer underflows
I/O port
• When writing in the TBi register during count stopped.
• When writing in the TBi register during count.
Count value can be read by reading TBi register
C
1
stopping counting
affected
1/(n+1)
Value is written to both reload register and counter
Value is written to only reload register (Transfered to counter when reloaded next)
, f
2 /
f o
2
8
, f
) B
3
8
8
, f
5
32
, and f
n: Setting value of TBi register (i=0,1)
0000
C32
(1)
16
-FFFF
16
Specification
16
and reload register contents are reloaded
16
. Figure 12.23 shows the TBiMR
12. Timer
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