M30280FAHP#D5 Renesas Electronics America, M30280FAHP#D5 Datasheet - Page 270
![IC M16C MCU FLASH 96K 80-LQFP](/photos/12/40/124063/m30280fahp_d5_sml.jpg)
M30280FAHP#D5
Manufacturer Part Number
M30280FAHP#D5
Description
IC M16C MCU FLASH 96K 80-LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/28r
Datasheet
1.M30280F6HPU9.pdf
(425 pages)
Specifications of M30280FAHP#D5
Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, POR, PWM, Voltage Detect, WDT
Number Of I /o
71
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
80-LQFP
For Use With
M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
M30280FAHP#D5A
Available stocks
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15.2 Resolution Select Function
15.3 Sample and Hold
15.4 Power Consumption Reducing Function
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The BITS bit in the ADCON1 register determines the resolution. When the BITS bit is set to “1” (10-bit
precision), the A/D conversion result is stored into bits 0 to 9 in the ADi register (i=0 to 7). When the BITS
bit is set to “0” (8-bit precision), the A/D conversion result is stored into bits 0 to 7 in the ADi register.
When the SMP bit in the ADCON 2 register is set to “1” (with the sample and hold function), A/D conver-
sion rate per pin increases to 28 AD cycles for 8-bit resolution or 33 AD cycles for 10-bit resolution. The
sample and hold function is available in one-shot mode, repeat mode, single sweep mode, repeat sweep
mode 0 and repeat sweep mode 1. In these modes, start A/D conversion after selecting whether the
sample and hold circuit is to be used or not. In simultaneous sample sweep mode, delayed trigger mode
0 or delayed trigger mode , set to use the Sample and Hold function before starting A/D conversion.
When the A/D converter is not used, the VCUT bit in the ADCON1 register isolates the resistor ladder of
the A/D converter from the reference voltage input pin (V
off any current flow into the resistor ladder from the V
When using the A/D converter, set the VCUT bit to “1” (Vref connected) before setting the ADST bit in the
ADCON0 register to “1” (A/D conversion started). Do not set the ADST bit and VCUT bit to “1” simulta-
neously, nor set the VCUT bit to “0” (Vref unconnected) during A/D conversion.
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page 248
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REF
REF
pin.
). Power consumption is reduced by shutting
15. A/D Converter
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