M30280FAHP#D5 Renesas Electronics America, M30280FAHP#D5 Datasheet - Page 55
![IC M16C MCU FLASH 96K 80-LQFP](/photos/12/40/124063/m30280fahp_d5_sml.jpg)
M30280FAHP#D5
Manufacturer Part Number
M30280FAHP#D5
Description
IC M16C MCU FLASH 96K 80-LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/28r
Datasheet
1.M30280F6HPU9.pdf
(425 pages)
Specifications of M30280FAHP#D5
Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, POR, PWM, Voltage Detect, WDT
Number Of I /o
71
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
80-LQFP
For Use With
M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
M30280FAHP#D5A
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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5.2 Software Reset
5.3 Watchdog Timer Reset
5.4 Oscillation Stop Detection Reset
e
E
1
. v
Figure 5.1 Example Reset Circuit
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6
0
When the PM03 bit in the PM0 register is set to “1” (microcomputer reset), the microcomputer has its pins,
CPU, and SFR initialized. Then the program is executed starting from the address indicated by the reset
vector. The device will reset using internal on-chip oscillator as the CPU clock.
At software reset, some SFR’s are not initialized. Refer to 4. Special Function Register (SFR).
When the PM12 bit in the PM1 register is “1” (reset when watchdog timer underflows), the microcomputer
initializes its pins, CPU and SFR if the watchdog timer underflows. The device will reset using internal on-
chip oscillator as the CPU clock. Then the program is executed starting from the address indicated by the
reset vector.
At watchdog timer reset, some SFR’s are not initialized. Refer to 4. Special Function Register (SFR).
When the CM20 bit in the CM2 register is set to “1” (oscillation stop, re-oscillation detection function en-
abled) and the CM27 bit in the CM2 register is “0” (reset at oscillation stop detection), the microcomputer
initializes its pins, CPU and SFR, coming to a halt if it detects main clock oscillation circuit stop. Refer to the
section 7.8 oscillation stop, re-oscillation detection function.
At oscillation stop detection reset, some SFR’s are not initialized. Refer to the section 4. Special Function
Register (SFR).
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0
0
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0
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RESET
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, 8
page 33
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8
5
V
RESET
CC
0V
0V
Recommended
operating
voltage
Equal to or less
than 0.2V
CC
More than td(ROC) + td(P-R)
Equal to or less
than 0.2V
CC
5. Reset
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