M30280FAHP#D5 Renesas Electronics America, M30280FAHP#D5 Datasheet - Page 8

• Manufacturer Part Number: M30280FAHP#D5
• Description: IC M16C MCU FLASH 96K 80-LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/Tiny/28r

Specifications of M30280FAHP#D5

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 71
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 80-LQFP
• For Use With: M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: M30280FAHP#D5A

3.
The symbols and terms used in register diagrams are described below.
*1
*2
*3
*4
• Reserved bit
• Nothing is assigned
• Do not set to a value
• Function varies according to the operating mode.
XXX Register
Blank: Set to 0 or 1 according to the application.
0: Set to 0.
1: Set to 1.
X: Nothing is assigned.
RW: Read and write.
RO: Read only.
WO: Write only.
−: Nothing is assigned.
b7
Register Notation
b6
Reserved bit. Set to specified value.
Nothing is assigned to the bit. As the bit may be used for future functions, if necessary, set to 0.
Operation is not guaranteed when a value is set.
The function of the bit varies with the peripheral function mode. Refer to the register diagram for information
on the individual modes.
b5
b4
0
b3
b2
b1
b0
Bit Symbol
XXX0
XXX1
XXX4
XXX5
XXX6
XXX7
(b2)
(b3)
*1
XXX bits
Nothing is assigned. If necessary, set to 0.
When read, the content is undefined.
Reserved bits
XXX bits
XXX bit
Symbol
XXX
Bit Name
1 0: XXX
0 1: XXX
1 0: Do not set.
1 1: XXX
Set to 0.
Function varies according to the operating
mode.
0: XXX
1: XXX
b1 b0
Address
XXX
Function
After Reset
00
16
RW
RW
RW
RW
RW
WO
RW
RO
*3
*4
*2