R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 1011

• Manufacturer Part Number: R5F61665N50FPV
• Description: MCU FLASH 512K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61665N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

20.3.15 EP3 Data Register (EPDR3)
EPDR3 is an 8-byte transmit FIFO buffer for endpoint 3. EPDR3 holds one packet of transmit data
for the interrupt transfer of endpoint 3. Transmit data is fixed by writing one packet of data and
setting EP3PKTE in the trigger register. When an ACK handshake is returned from the host after
one packet of data has been transmitted successfully, EP3TS in interrupt flag register 0 is set. This
FIFO buffer can be initialized by means of EP3CLR in the FCLR register.
20.3.16 EP0o Receive Data Size Register (EPSZ0o)
EPSZ0o indicates the number of bytes received at endpoint 0 from the host.
Bit
7 to 0
Bit
7 to 0
Bit
Bit Name
Initial Value
R/W
Bit
Bit Name
Initial Value
R/W
Bit Name
Bit Name
—
D7 to D0
Undefined
D7
—
W
R
7
7
0
Undefined
Initial
Value
Undefined W
Initial
Value
All 0
D6
W
—
R
6
6
0
Undefined
R/W
R/W
R
D5
—
W
R
5
5
0
Description
Data register for endpoint 3 transfer
Description
Number of receive data for endpoint 0
Undefined
D4
W
—
R
4
4
0
Undefined
D3
—
W
R
3
3
0
Rev. 2.00 Oct. 21, 2009 Page 977 of 1454
Section 20 USB Function Module (USB)
Undefined
D2
W
—
R
2
2
0
Undefined
D1
—
W
R
1
1
0
REJ09B0498-0200
Undefined
D0
W
—
R
0
0
0