R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 506

• Manufacturer Part Number: R5F61665N50FPV
• Description: MCU FLASH 512K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61665N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 11 EXDMA Controller (EXDMAC)
Rev. 2.00 Oct. 21, 2009 Page 472 of 1454
REJ09B0498-0200
Bit
15
14, 13
12
11
10
9
8
Bit Name
⎯
SARA4
SARA3
SARA2
SARA1
SARA0
SARIE
Initial
value
0
All 0
0
0
0
0
0
R/W
R/W
R
R/W
R/W
R/W
R/W
R/W
Description
Source Address Extended Repeat Area Overflow
Interrupt Enable
Enables or disables the source address extended
repeat area overflow interrupt request.
When this bit is set to 1, in the event of source address
extended repeat area overflow, the DTE bit is cleared to
0 in EDMDR. At the same time, the ESIF bit is set to 1
in EDMDR to indicate that the source address extended
repeat area overflow interrupt is requested.
When used together with block transfer mode, an
interrupt is requested at the end of a block-size transfer.
If the DTE bit is set to 1 in EDMDR for the channel on
which transfer is terminated by an interrupt, transfer can
be resumed from the state in which it ended.
If a source address extended repeat area is not
designated, the specification by this bit is ignored.
0: Source address extended repeat area overflow
1: Source address extended repeat area overflow
Reserved
They are always read as 0 and cannot be modified.
Source Address Extended Repeat Area
These bits specify the source address (EDSAR)
extended repeat area. The extended repeat area
function updates the specified lower address bits,
leaving the remaining upper address bits always the
same. An extended repeat area size of 4 bytes to 128
Mbytes can be specified. The setting interval is a
power-of-two number of bytes.
When extended repeat area overflow results from
incrementing or decrementing an address, the lower
address is the start address of the extended repeat
area in the case of address incrementing, or the last
address of the extended repeat area in the case of
address decrementing.
If SARIE bit is set to 1, an interrupt can be requested
when an extended repeat area overflow occurs.
Table 11.3 shows the settings and ranges of the
extended repeat area.
interrupt request disabled
interrupt request enabled