R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 802

• Manufacturer Part Number: R5F61665N50FPV
• Description: MCU FLASH 512K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61665N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 14 16-Bit Timer Pulse Unit (TPU)
14.10.13 Multiplexing of I/O Pins
In this LSI, the TCLKA input pin is multiplexed with the TIOCC0 I/O pin, the TCLKB input pin
with the TIOCD0 I/O pin, the TCLKC input pin with the TIOCB1 I/O pin, and the TCLKD input
pin with the TIOCB2 I/O pin. When an external clock is input, compare match output should not
be performed from a multiplexed pin.
14.10.14 PPG1 Setting when TPU1 Pin is Used
When the TPU1 pin is used, the NDER bit of the PPG1 pin multiplexed with the TPU1 pin should
be cleared to halt the output. For details, see section 13, I/O Ports.
14.10.15 Interrupts in the Module Stop State
If module stop state is entered when an interrupt has been requested, it will not be possible to clear
the CPU interrupt source, or the DTC or DMAC activation sources. Interrupts should therefore be
disabled before entering module stop state.
Rev. 2.00 Oct. 21, 2009 Page 768 of 1454
REJ09B0498-0200