R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 272
R5F61665N50FPV
Manufacturer Part Number
R5F61665N50FPV
Description
MCU FLASH 512K ROM 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet
1.R5F61665N50FPV.pdf
(1492 pages)
Specifications of R5F61665N50FPV
Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F61665N50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 9 Bus Controller (BSC)
(2)
With the 16-bit access space, the upper byte data bus (D15 to D8) and lower byte data bus (D7 to
D0) are used for accesses. The amount of data that can be accessed at one time is one byte or one
word.
Figures 9.13 and 9.14 illustrate data alignment control for the 16-bit access space. Figure 9.13
shows the data alignment when the data endian format is specified as big endian. Figure 9.14
shows the data alignment when the data endian format is specified as little endian.
In big endian, byte access for an even address is performed by using the upper byte data bus and
byte access for an odd address is performed by using the lower byte data bus.
In little endian, byte access for an even address is performed by using the lower byte data bus, and
byte access for an odd address is performed by using the third byte data bus.
Rev. 2.00 Oct. 21, 2009 Page 238 of 1454
REJ09B0498-0200
Longword
16-Bit Access Space
Data
Size
Byte
Word
Figure 9.12 Access Sizes and Data Alignment Control for 8-Bit Access Space
Access
Address
n
n
n
Access
Count
1
2
4
(Little Endian)
Bus
Cycle
1st
1st
2nd
1st
2nd
3rd
4th
Data Size
Byte
Byte
Byte
Byte
Byte
Byte
Byte
D15
LHWR/LUB
Strobe signal
Data bus
D8 D7
RD
15
15
23
31
7
7
7
LLWR/LLB
D0
16
24
0
0
8
0
8
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