R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 1169

• Manufacturer Part Number: R5F61665N50FPV
• Description: MCU FLASH 512K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61665N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 25 Flash Memory
(b) Initialization before Programming/Erasure
The on-chip program includes the initialization program. A pulse with the specified period must
be applied when programming or erasing. The specified pulse width is made by the method in
which wait loop is configured by the CPU instruction. Accordingly, the operating frequency of the
CPU must be set. The initial program is set as a parameter of the programming/erasing program
which has been downloaded to perform these settings.
(c)
Programming
When the flash memory is programmed, the start address of the programming destination on the
user MAT and the program data must be passed to the programming program.
The start address of the programming destination on the user MAT must be stored in general
register ER1. This parameter is called the flash multipurpose address area parameter (FMPAR).
The program data is always in 128-byte units. When the program data does not satisfy 128 bytes,
128-byte program data is prepared by filling the dummy code (H'FF). The boundary of the start
address of the programming destination on the user MAT is aligned at an address where the lower
eight bits (A7 to A0) are H'00 or H'80.
The program data for the user MAT must be prepared in consecutive areas. The program data
must be in a consecutive space which can be accessed using the MOV.B instruction of the CPU
and is not in the flash memory space.
The start address of the area that stores the data to be written in the user MAT must be set in
general register ER0. This parameter is called the flash multipurpose data destination area
parameter (FMPDR).
For details on the programming procedure, see section 25.8.3, User Program Mode.
(d) Erasure
When the flash memory is erased, the erase block number on the user MAT must be passed to the
erasing program which is downloaded.
The erase block number on the user MAT must be set in general register ER0. This parameter is
called the flash erase block select parameter (FEBS).
One block is selected from the block numbers of 0 to 19 as the erase block number.
For details on the erasing procedure, see section 25.8.3, User Program Mode.
Rev. 2.00 Oct. 21, 2009 Page 1135 of 1454
REJ09B0498-0200