UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet - Page 629

• Manufacturer Part Number: UPD78F1174AGF-GAT-AX
• Description: MCU 16BIT 78K0R/KX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1174AGF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, EBI/EMI, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(3) Stop condition
Notes 1. To cancel a wait state, write “FFH” to IIC0 or set WREL0.
(When 8-Clock and 9-Clock Wait Is Selected for Master, 9-Clock Wait Is Selected for Slave) (3/3)
WREL0
INTIIC0
WREL0
INTIIC0
ACKD0
MSTS0
ACKD0
MSTS0
WTIM0
ACKE0
WTIM0
ACKE0
Processing by master device
Transfer lines
Processing by slave device
SPD0
TRC0
SDA0
SPD0
TRC0
STD0
STD0
STT0
SPT0
SCL0
STT0
SPT0
IIC0
IIC0
2. Write data to IIC0, not setting WREL0, in order to cancel a wait state during slave transmission.
3. If a wait state during slave transmission is canceled by setting WREL0, TRC0 will be cleared.
Receiving
Transmitting
H
H
L
L
L
Figure 14-29. Example of Slave to Master Communication
IIC0
D7
1
←
data Note 2
D6
2
CHAPTER 14 SERIAL INTERFACE IIC0
D5
3
User’s Manual U18432EJ5V0UD
D4
4
D3
5
D2
6
D1
7
D0
8
IIC0
NACK
Note 1
9
←
FFH Note 1
IIC0
Notes 1, 3
Note 3
←
condition
FFH Note 1
Stop
(When SPIE0 = 1)
(When SPIE0 = 1)
Receiving
IIC0
←
condition
address
Start
AD6
1
627