UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet - Page 961

• Manufacturer Part Number: UPD78F1174AGF-GAT-AX
• Description: MCU 16BIT 78K0R/KX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1174AGF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, EBI/EMI, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

2nd edition
4th edition
Edition
Change of figures and figure title in Supply Voltage Rise Time Timing
Addition of Detection delay time to LVI Circuit Characteristics
Change of Flash Memory Programming Characteristics
Change of A.4.1 When using flash memory programmer FG-FP4 and FL-PR4
Change of A.4.2 When using on-chip debug emulator with programming
function QB-MINI2
Change of A.5.2 When using on-chip debug emulator with programming
function QB-MINI2
Addition of expanded-specification products,
78F1177A, 78F1178A
Addition of (A) grade products of expanded-specification products,
μ
Change of related documents
Addition of 1.1 Differences Between Conventional-Specification Products
(
Addition of Caution 4 to 1.5 Pin Configuration (Top View)
Modification of 1.7 Block Diagram
Change of description in 2.2.17 AV
Change of description in 2.2.18 AV
Change of description in 2.2.20 RESET
Change of I/O circuit type of P97 and P127 and descriptions of AV
RESET pin in Table 2-4 Connection of Unused Pins
Addition of Note to Figures 3-1 to 3-5
Change of figure in Remark of 3.1 Memory Space
Change of description in 3.1.1 (1) Vector table area
Change of description in 3.1.2 Mirror area
Change of description and addition and change of Caution in 3.1.3 Internal data
memory space
Addition of Cautions to 3.2.1 (3) Stack pointer (SP)
Modification of Table 3-5 SFR List
Change of Figure 4-26 Block Diagram of P52 to P57
Addition of description of PU6
Modification of Figure 4-31 Block Diagram of P80 to P87
Addition of Caution 3 to Figure 4-55 Format of A/D Port Configuration Register
(ADPC)
Change of Notes of Table 4-6 Settings of Port Mode Register and Output Latch
When Using Alternate Function
Change of 5.5 Number of Instruction Execution Clocks and Instruction Wait
Clocks for Fetch Access
Change of description in 5.6 (4) WAIT pin (alternate function: P06)
Addition of 5.6 (6) CLKOUT pin (alternate function: P05)
μ
PD78F1174A(A), 78F1175A(A), 78F1176A(A), 78F1177A(A), 78F1178A(A)
PD78F117x) and Expanded-Specification Products (
APPENDIX C REVISION HISTORY
User’s Manual U18432EJ5V0UD
REF0
REF1
Description
μ
PD78F1174A, 78F1175A, 78F1176A,
μ
PD78F117xA)
REF0
, AV
REF1
, and
CHAPTER 29
ELECTRICAL
SPECIFICATIONS
(TARGET)
APPENDIX A
DEVELOPMENT
TOOLS
Throughout
INTRODUCTION
CHAPTER 1 OUTLINE
CHAPTER 2 PIN
FUNCTIONS
CHAPTER 3 CPU
ARCHITECTURE
CHAPTER 4 PORT
FUNCTIONS
CHAPTER 5
EXTERNAL BUS
INTERFACE
Chapter
(7/13)
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