MC9S12XA512VAG Freescale Semiconductor, MC9S12XA512VAG Datasheet - Page 809

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MC9S12XA512VAG

Manufacturer Part Number
MC9S12XA512VAG
Description
IC MCU 512K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheets

Specifications of MC9S12XA512VAG

Core Processor
HCS12X
Core Size
16-Bit
Speed
80MHz
Connectivity
EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
119
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 105°C
Package / Case
144-LQFP
Data Bus Width
16 bit
Data Ram Size
32 KB
Interface Type
CAN, I2C, SCI, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
59
Number Of Timers
12
Operating Supply Voltage
0 V to 5.5 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 24 Channel)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Freescale Semiconductor
Port
E
Pin Name
PE[7]
PE[6]
PE[5]
PE[4]
PE[3]
PE[2]
PE[1]
PE[0]
Pin Function
and Priority
EROMCTL
XCLKS
ECLKX2
MODB
MODA
TAGLO
LSTRB
TAGHI
ECLK
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
XIRQ
GPIO
LDS
R/W
IRQ
WE
RE
Table 22-1. Pin Functions and Priorities (Sheet 2 of 7)
1
1
1
1
MC9S12XDP512 Data Sheet, Rev. 2.21
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
External clock selection input during RESET
Free-running clock output at Core Clock rate (ECLK x 2)
General-purpose I/O
MODB input during RESET
Instruction tagging low pin
Configurable for reduced input threshold
General-purpose I/O
MODA input during RESET
Read enable signal
Instruction tagging low pin
Configurable for reduced input threshold
General-purpose I/O
Free-running clock output at the Bus Clock rate or
programmable divided in normal modes
General-purpose I/O
EROMON bit control input during RESET
Low strobe bar output
Lower data strobe
General-purpose I/O
Read/write output for external bus
Write enable signal
General-purpose I/O
Maskable level- or falling edge-sensitive interrupt input
General-purpose I/O
Non-maskable level-sensitive interrupt input
General-purpose I/O
Chapter 22 DP512 Port Integration Module (S12XDP512PIMV2)
Description
Pin Function
after Reset
dependent
Mode
811
3

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