MC9S12XA512VAG Freescale Semiconductor, MC9S12XA512VAG Datasheet - Page 885

• Manufacturer Part Number: MC9S12XA512VAG
• Description: IC MCU 512K FLASH 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12XA512VAG

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 80MHz
• Connectivity: EBI/EMI, I²C, IrDA, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 119
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 144-LQFP
• Data Bus Width: 16 bit
• Data Ram Size: 32 KB
• Interface Type: CAN, I2C, SCI, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 59
• Number Of Timers: 12
• Operating Supply Voltage: 0 V to 5.5 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (10 bit, 24 Channel)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

22.4.3
Ports P, H and J offer pin interrupt capability. The interrupt enable as well as the sensitivity to rising or
falling edges can be individually configured on per-pin basis. All bits/pins in a port share the same
interrupt vector. Interrupts can be used with the pins configured as inputs or outputs.
An interrupt is generated when a bit in the port interrupt flag register and its corresponding port interrupt
enable bit are both set. The pin interrupt feature is also capable to wake up the CPU when it is in STOP or
WAIT mode.
A digital filter on each pin prevents pulses
interrupt. The minimum time varies over process conditions, temperature and voltage
Table
Freescale Semiconductor
22-69).
Pin Interrupts
Glitch, filtered out, no interrupt flag set
Valid pulse, interrupt flag set
1
Figure 22-77. Interrupt Glitch Filter on Port P, H, and J (PPS = 0)
These values include the spread of the oscillator frequency over temperature,
voltage and process.
Uncertain
Ignored
Pulse
Valid
t
Table 22-69. Pulse Detection Criteria
pign
MC9S12XDP512 Data Sheet, Rev. 2.21
Figure 22-78. Pulse Illustration
3 < t
t
pval
t
t
pulse
pulse
STOP
pulse
(Figure
< 4
3
4
uncertain
t
22-78) shorter than a specified time from generating an
pulse
Bus clocks
Bus clocks
Bus clocks
Chapter 22 DP512 Port Integration Module (S12XDP512PIMV2)
Unit
Mode
t
pign
t
t
pulse
pulse
< t
STOP
pulse
t
t
pign
pval
1
< t
pval
(Figure 22-77
and
887