C8051F537-IT Silicon Laboratories Inc, C8051F537-IT Datasheet - Page 36

• Manufacturer Part Number: C8051F537-IT
• Description: IC 8051 MCU 2K FLASH 20TSSOP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F53xr

Specifications of C8051F537-IT

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 16
• Program Memory Size: 2KB (2K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.25 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 20-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: 336-1401

C8051F52x/F52xA/F53x/F53xA
Table 3.1. Pin Definitions for the C8051F52x and C8051F52xA (DFN 10)
36
Note: Please refer to Section “20. Device Specific Behavior” on page 209.
P0.5/RX*/
CNVSTR
CNVSTR
P0.4/RX*
P0.4/TX*
V
XTAL2
Name
C2CK
RST/
P0.0/
V
P0.5/
GND
P0.3
REGIN
V
REF
DD
‘F52xA ‘F52x
Pin Numbers
—
—
1
2
3
4
5
6
7
8
—
—
—
1
2
3
4
5
6
7
D I/O or
D I/O or
D I/O or
D I/O or
D I/O or
D I/O or
A O or
D I/O
D I/O
D I/O
Type
D In
D In
D In
A In
A In
A In
A In
A In
A In
Description
Device Reset. Open-drain output of internal POR or V
An external source can initiate a system reset by driving this pin
low for at least the minimum RST low time to generate a system
reset, as defined in Table 2.7 on page 32. A 1 k pullup to V
is recommended. See Reset Sources Section for a complete
description.
Clock signal for the C2 Debug Interface.
Port 0.0. See Port I/O Section for a complete description.
External V
Ground.
Core Supply Voltage.
On-Chip Voltage Regulator Input.
Port 0.5. See Port I/O Section for a complete description.
External Converter start input for the ADC0, see Section “4. 12-Bit
ADC (ADC0)” on page 52 for a complete description.
Port 0.5. See Port I/O Section for a complete description.
External Converter start input for the ADC0, see Section “4. 12-Bit
ADC (ADC0)” on page 52 for a complete description.
Port 0.4. See Port I/O Section for a complete description.
Port 0.4. See Port I/O Section for a complete description.
Port 0.3. See Port I/O Section for a complete description.
External Clock Output. For an external crystal or resonator, this pin
is the excitation driver. This pin is the external clock input for
CMOS, capacitor, or RC oscillator configurations. See Section
“14. Oscillators” on page 134.
Rev. 1.3
REF
Input. See V
REF
Section.
DD
monitor.
REGIN