STEVAL-IPE010V1 STMicroelectronics, STEVAL-IPE010V1 Datasheet - Page 54

• Manufacturer Part Number: STEVAL-IPE010V1
• Description: KIT DEMO ENERGY METER STPMC1/S1
• Manufacturer: STMicroelectronics
• Type: Other Power Managementr

Specifications of STEVAL-IPE010V1

• Main Purpose: Power Management, Energy/Power Meter
• Embedded: No
• Utilized Ic / Part: STPMC1, STPMS1
• Maximum Operating Temperature: + 85 C
• Product: Power Management Development Tools
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Secondary Attributes: -
• Primary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: STPMC1, STPMS1
• Other names: 497-10754

Theory of operation
Table 30.
9.19
54/77
Bit
0
1
2
3
4
5
6
7
Name
SIGN
LOW
ZRC
NAH
BCF
BFR
LIN
BIL
X-phase status bits description
U
I
There is no differences between status register of x phase in DAx, DRx, DFx, except for first
bit of status register [0] BIL . This bit indicates no-load condition.
In DAx status register bit BIL is represents NLC for phase X active energy.
In DRx status register bit BIL is represents NLC for phase X reactive energy.
In DFx status register bit BIL is represents NLC for phase X fundamental energy.
In standalone operating mode the 3-ph BIL signal is available on SCLNLC pin, 3-ph SIGN in
the SYN pin and Tamper flag (is the OR of all tamper conditions - see paragraph
SDATD pin. All the other signals can be read only through SPI interface.
When STPMC1 is used in peripheral mode all these signals can be read through the SPI
interface. See paragraph
records.
Configuration bits map
As indicated in the data records map (see paragraph
configuration bits (CFG data records). Each of them consists of paired elements, one is the
latch (the OTP shadow), and the other is the OTP antifuse element. In this way all the
configuration bits that control the operation of the device can be written in a temporary or
permanent way.
In case of temporary writing the configuration bits values are written in the so-called shadow
registers, which are simple latches that hold the configuration data. The shadow registers
are cleared whenever a reset condition occurs (both POR and remote reset).
In case of permanent writing the configuration bits are stored in the OTP (one time
programmable) cells that keep the information permanently even if the STPMC1 is without
supply, but, once written, they cannot be changed anymore. That's why the CFG are used to
keep critical informations like configuration and calibration values of device. When the
STPMC1 is released all antifuses presents low logic state.
Xmax
Xmax
No-load Condition not detected
Frequency of phase voltage is in range
Active energy is negative
Phase 0
After zero crossing
U
Single Wire Meter mode
I
= 2
X
= 2
x
> I
> U
signals alive
16
12
Xmax
Xmax
/4096 and BFR==1
u <
/ 16
0
9.18
Doc ID 15728 Rev 4
for details on the Status bit location in the STPMC1 data
One or both
Frequency of line voltage is out of range or voltage
amplitude is below threshold (LOW = 1)
Active energy is positive
Phase
After max value crossing
U
Normal operation mode
BFR==0 or I
No-load condition detected
x
< U
Xmax
u < 2
9.17
/ 32
X
< I
), the STPMC1 has 112
signal stuck
Xmax
/ 8192 and BFR==1
1
9.10
STPMC1
) in