PIC18F26K22-I/ML Microchip Technology, PIC18F26K22-I/ML Datasheet - Page 242

IC PIC MCU 64KB FLASH 28QFN

PIC18F26K22-I/ML

Manufacturer Part Number
PIC18F26K22-I/ML
Description
IC PIC MCU 64KB FLASH 28QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F26K22-I/ML

Core Size
8-Bit
Program Memory Size
64KB (32K x 16)
Core Processor
PIC
Speed
64MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 19x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad
Controller Family/series
PIC18
No. Of I/o's
25
Eeprom Memory Size
1KB
Ram Memory Size
3896Byte
Cpu Speed
64MHz
No. Of Timers
7
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F26K22-I/ML
Manufacturer:
MICROCHIP
Quantity:
3 400
Part Number:
PIC18F26K22-I/ML
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC18(L)F2X/4XK22
15.6.4
To initiate a Start condition, the user sets the Start
Enable bit, SEN, of the SSPxCON2 register. If the
SDAx and SCLx pins are sampled high, the Baud Rate
Generator
SSPxADD<7:0> and starts its count. If SCLx and
SDAx are both sampled high when the Baud Rate
Generator times out (T
low. The action of the SDAx being driven low while
SCLx is high is the Start condition and causes the S bit
of the SSPxSTAT1 register to be set. Following this,
the Baud Rate Generator is reloaded with the contents
of SSPxADD<7:0> and resumes its count. When the
Baud Rate Generator times out (T
the SSPxCON2 register will be automatically cleared
FIGURE 15-26:
DS41412A-page 242
I
CONDITION TIMING
2
C MASTER MODE START
is
reloaded
FIRST START BIT TIMING
Write to SEN bit occurs here
BRG
), the SDAx pin is driven
with
SDAx
SCLx
BRG
the
), the SEN bit of
contents
SDAx = 1,
SCLx = 1
T
BRG
Preliminary
of
S
Set S bit (SSPxSTAT<3>)
T
BRG
At completion of Start bit,
hardware clears SEN bit
by hardware; the Baud Rate Generator is suspended,
leaving the SDAx line held low and the Start condition
is complete.
and sets SSPxIF bit
Note 1: If at the beginning of the Start condition,
Write to SSPxBUF occurs here
T
BRG
2: The Philips I
1st bit
the SDAx and SCLx pins are already sam-
pled low, or if during the Start condition,
the SCLx line is sampled low before the
SDAx line is driven low, a bus collision
occurs, the Bus Collision Interrupt Flag,
BCLxIF, is set, the Start condition is
aborted and the I
Idle state.
bus collision cannot occur on a Start.
T
BRG
 2010 Microchip Technology Inc.
2
C Specification states that a
2nd bit
2
C module is reset into its

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