PIC18F26K22-I/ML Microchip Technology, PIC18F26K22-I/ML Datasheet - Page 345

IC PIC MCU 64KB FLASH 28QFN

PIC18F26K22-I/ML

Manufacturer Part Number
PIC18F26K22-I/ML
Description
IC PIC MCU 64KB FLASH 28QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F26K22-I/ML

Core Size
8-Bit
Program Memory Size
64KB (32K x 16)
Core Processor
PIC
Speed
64MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 19x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad
Controller Family/series
PIC18
No. Of I/o's
25
Eeprom Memory Size
1KB
Ram Memory Size
3896Byte
Cpu Speed
64MHz
No. Of Timers
7
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F26K22-I/ML
Manufacturer:
MICROCHIP
Quantity:
3 400
Part Number:
PIC18F26K22-I/ML
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
23.0
The PIC18(L)F2X/4XK22 devices have a High/Low-Volt-
age Detect module (HLVD). This is a programmable cir-
cuit that sets both a device voltage trip point and the
direction of change from that point. If the device experi-
ences an excursion past the trip point in that direction, an
interrupt flag is set. If the interrupt is enabled, the pro-
gram execution branches to the interrupt vector address
and the software responds to the interrupt.
REGISTER 23-1:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3-0
Note 1:
VDIRMAG
R/W-0
HIGH/LOW-VOLTAGE DETECT
(HLVD)
See Table 27-4 for specifications.
VDIRMAG: Voltage Direction Magnitude Select bit
1 = Event occurs when voltage equals or exceeds trip point (HLVDL<3:0>)
0 = Event occurs when voltage equals or falls below trip point (HLVDL<3:0>)
BGVST: Band Gap Reference Voltages Stable Status Flag bit
1 = Internal band gap voltage references are stable
0 = Internal band gap voltage reference is not stable
IRVST: Internal Reference Voltage Stable Flag bit
1 = Indicates that the voltage detect logic will generate the interrupt flag at the specified voltage range
0 = Indicates that the voltage detect logic will not generate the interrupt flag at the specified voltage
HLVDEN: High/Low-Voltage Detect Power Enable bit
1 = HLVD enabled
0 = HLVD disabled
HLVDL<3:0>: Voltage Detection Level bits
1111 = External analog input is used (input comes from the HLVDIN pin)
1110 = Maximum setting
.
.
.
0000 = Minimum setting
BGVST
range and the HLVD interrupt should not be enabled
R-0
HLVDCON: HIGH/LOW-VOLTAGE DETECT CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
IRVST
R-0
HLVDEN
R/W-0
Preliminary
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
The
(Register 23-1) completely controls the operation of the
HLVD module. This allows the circuitry to be “turned
off” by the user under software control, which
minimizes the current consumption for the device.
The module’s block diagram is shown in Figure 23-1.
PIC18(L)F2X/4XK22
High/Low-Voltage
R/W-1
HLVDL<3:0>
x = Bit is unknown
Detect
R/W-0
DS41412A-page 345
Control
R/W-1
register
bit 0

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