PIC18F26K22-I/ML Microchip Technology, PIC18F26K22-I/ML Datasheet - Page 63

• Manufacturer Part Number: PIC18F26K22-I/ML
• Description: IC PIC MCU 64KB FLASH 28QFN
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F26K22-I/ML

• Core Size: 8-Bit
• Program Memory Size: 64KB (32K x 16)
• Core Processor: PIC
• Speed: 64MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 19x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad
• Controller Family/series: PIC18
• No. Of I/o's: 25
• Eeprom Memory Size: 1KB
• Ram Memory Size: 3896Byte
• Cpu Speed: 64MHz
• No. Of Timers: 7
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TABLE 4-1:
4.5
PIC18(L)F2X/4XK22
separate on-chip timers that help regulate the Power-
on Reset process. Their main function is to ensure that
the device clock is stable before code is executed.
These timers are:
• Power-up Timer (PWRT)
• Oscillator Start-up Timer (OST)
• PLL Lock Time-out
4.5.1
The Power-up Timer (PWRT) of PIC18(L)F2X/4XK22
devices is an 11-bit counter which uses the
LFINTOSC source as the clock input. This yields an
approximate time interval of 2048 x 32 s = 65.6 ms.
While the PWRT is counting, the device is held in
Reset.
The power-up time delay depends on the LFINTOSC
clock and will vary from chip-to-chip due to temperature
and process variation.
The PWRT is enabled by clearing the PWRTEN
Configuration bit.
4.5.2
The Oscillator Start-up Timer (OST) provides a 1024
oscillator cycle (from OSC1 input) delay after the
PWRT delay is over. This ensures that the crystal
oscillator or resonator has started and stabilized.
The OST time-out is invoked only for XT, LP and HS
modes and only on Power-on Reset, or on exit from all
power-managed modes that stop the external oscillator.
 2010 Microchip Technology Inc.
BOREN1
BOR Configuration
0
0
1
1
Device Reset Timers
POWER-UP TIMER (PWRT)
OSCILLATOR START-UP TIMER
(OST)
BOREN0
0
1
0
1
BOR CONFIGURATIONS
devices
(RCON<6>)
Unavailable
Unavailable
Unavailable
SBOREN
Available
Status of
incorporate
BOR disabled; must be enabled by reprogramming the Configuration bits.
BOR enabled by software; operation controlled by SBOREN.
BOR enabled by hardware in Run and Idle modes, disabled during
Sleep mode.
BOR enabled by hardware; must be disabled by reprogramming the Configuration bits.
three
Preliminary
4.5.3
With the PLL enabled, the time-out sequence following a
Power-on Reset is slightly different from other oscillator
modes. A separate timer is used to provide a fixed time-
out that is sufficient for the PLL to lock to the main
oscillator frequency. This PLL lock time-out (T
typically 2 ms and follows the oscillator start-up time-out.
4.5.4
On power-up, the time-out sequence is as follows:
1.
2.
The total time-out will vary based on oscillator
configuration and the status of the PWRT. Figure 4-3,
Figure 4-4, Figure 4-5, Figure 4-6 and Figure 4-7 all
depict time-out sequences on power-up, with the
Power-up Timer enabled and the device operating in
HS Oscillator mode. Figures 4-3 through 4-6 also
apply to devices operating in XT or LP modes. For
devices in RC mode and with the PWRT disabled, on
the other hand, there will be no time-out at all.
Since the time-outs occur from the POR pulse, if MCLR
is kept low long enough, all time-outs will expire, after
which, bringing MCLR high will allow program
execution to begin immediately (Figure 4-5). This is
useful for testing purposes or to synchronize more than
one PIC
PIC18(L)F2X/4XK22
After the POR pulse has cleared, PWRT time-out
is invoked (if enabled).
Then, the OST is activated.
BOR Operation
®
MCU device operating in parallel.
PLL LOCK TIME-OUT
TIME-OUT SEQUENCE
DS41412A-page 63
PLL
) is