PIC18F26K22-I/ML Microchip Technology, PIC18F26K22-I/ML Datasheet - Page 484

• Manufacturer Part Number: PIC18F26K22-I/ML
• Description: IC PIC MCU 64KB FLASH 28QFN
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F26K22-I/ML

• Core Size: 8-Bit
• Program Memory Size: 64KB (32K x 16)
• Core Processor: PIC
• Speed: 64MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 19x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad
• Controller Family/series: PIC18
• No. Of I/o's: 25
• Eeprom Memory Size: 1KB
• Ram Memory Size: 3896Byte
• Cpu Speed: 64MHz
• No. Of Timers: 7
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18(L)F2X/4XK22
Extended Instruction Set
F
Fail-Safe Clock Monitor .............................................. 44, 351
Fast Register Stack ............................................................ 72
Fixed Voltage Reference (FVR)
Flash Program Memory ...................................................... 95
G
GOTO ............................................................................... 390
H
Hardware Multiplier .......................................................... 111
High/Low-Voltage Detect ................................................. 345
DS41412A-page 484
Synchronous Master Mode .............................. 285, 290
Synchronous Slave Mode
ADDFSR .................................................................. 412
ADDULNK ................................................................ 412
and Using MPLAB Tools .......................................... 418
CALLW ..................................................................... 413
Considerations for Use ............................................ 416
MOVSF .................................................................... 413
MOVSS .................................................................... 414
PUSHL ..................................................................... 414
SUBFSR .................................................................. 415
SUBULNK ................................................................ 415
Syntax ...................................................................... 411
Fail-Safe Condition Clearing ...................................... 44
Fail-Safe Detection .................................................... 44
Fail-Safe Operation .................................................... 44
Reset or Wake-up from Sleep .................................... 44
Associated Registers ............................................... 340
Associated Registers ............................................... 103
Control Registers ....................................................... 96
Erase Sequence ...................................................... 100
Erasing ..................................................................... 100
Operation During Code-Protect ............................... 103
Reading ...................................................................... 99
Table Pointer
Table Pointer Boundaries .......................................... 98
Table Reads and Table Writes .................................. 95
Write Sequence ....................................................... 101
Writing To ................................................................. 101
Introduction .............................................................. 111
Operation ................................................................. 111
Performance Comparison ........................................ 111
Applications .............................................................. 348
Associated Registers ............................................... 349
Characteristics ......................................................... 442
Current Consumption ............................................... 347
Effects of a Reset ..................................................... 349
Operation ................................................................. 346
Associated Registers, Receive ........................ 289
Associated Registers, Transmit ............... 286, 291
Reception ......................................................... 288
Transmission .................................................... 285
Associated Registers, Receive ........................ 292
Reception ......................................................... 292
Transmission .................................................... 290
EECON1 and EECON2 ..................................... 96
TABLAT (Table Latch) Register ......................... 98
TBLPTR (Table Pointer) Register ...................... 98
Boundaries Based on Operation ........................ 98
Protection Against Spurious Writes ................. 103
Unexpected Termination .................................. 103
Write Verify ...................................................... 103
Preliminary
HLVD. See High/Low-Voltage Detect. ............................. 345
I
I
ID Locations ............................................................. 351, 367
INCF ................................................................................ 390
INCFSZ ............................................................................ 391
In-Circuit Debugger .......................................................... 367
In-Circuit Serial Programming (ICSP) ...................... 351, 367
Indexed Literal Offset Addressing
Indexed Literal Offset Mode ............................................. 416
Indirect Addressing ............................................................ 91
INFSNZ ............................................................................ 391
Instruction Cycle ................................................................ 74
Instruction Flow/Pipelining ................................................. 74
Instruction Set .................................................................. 369
2
C Mode (MSSPx)
Setup ....................................................................... 347
Start-up Time ........................................................... 347
Typical Low-Voltage Detect Application .................. 348
Acknowledge Sequence Timing .............................. 248
Bus Collision
Effects of a Reset .................................................... 249
I
Master Mode
Multi-Master Communication, Bus Collision and
Multi-Master Mode ................................................... 249
Read/Write Bit Information (R/W Bit) ....................... 225
Slave Mode
Sleep Operation ....................................................... 249
Stop Condition Timing ............................................. 248
and Standard PIC18 Instructions ............................. 416
Clocking Scheme ....................................................... 74
ADDLW .................................................................... 375
ADDWF .................................................................... 375
ADDWF (Indexed Literal Offset Mode) .................... 417
ADDWFC ................................................................. 376
ANDLW .................................................................... 376
ANDWF .................................................................... 377
BC ............................................................................ 377
BCF ......................................................................... 378
BN ............................................................................ 378
BNC ......................................................................... 379
BNN ......................................................................... 379
BNOV ...................................................................... 380
BNZ ......................................................................... 380
BOV ......................................................................... 383
BRA ......................................................................... 381
BSF .......................................................................... 381
BSF (Indexed Literal Offset Mode) .......................... 417
BTFSC ..................................................................... 382
BTFSS ..................................................................... 382
BTG ......................................................................... 383
BZ ............................................................................ 384
CALL ........................................................................ 384
CLRF ....................................................................... 385
CLRWDT ................................................................. 385
COMF ...................................................................... 386
2
C Clock Rate w/BRG ............................................. 256
During Sleep .................................................... 349
During a Repeated Start Condition .................. 253
During a Stop Condition .................................. 254
Operation ......................................................... 240
Reception ........................................................ 246
Start Condition Timing ............................. 242, 243
Transmission ................................................... 244
Arbitration ........................................................ 250
Transmission ................................................... 230
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