ATTINY261-20MUR Atmel, ATTINY261-20MUR Datasheet - Page 172

IC MCU AVR 2K FLASH 20MHZ 32QFN

ATTINY261-20MUR

Manufacturer Part Number
ATTINY261-20MUR
Description
IC MCU AVR 2K FLASH 20MHZ 32QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheets

Specifications of ATTINY261-20MUR

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
2KB (1K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
18.2.1
18.3
172
Signature Bytes
ATtiny261/461/861
Latching of Fuses
Table 18-5.
Notes:
Note that fuse bits are locked if Lock Bit 1 (LB1) is programmed. Fuse bits should be pro-
grammed before lock bits. The status of fuse bits is not affected by chip erase.
Fuse bits can also be read by device firmware. See section
Software” on page
Fuse values are latched when the device enters programming mode and changes to fuse values
have no effect until the part leaves programming mode. This does not apply to the EESAVE
Fuse which will take effect once it is programmed. Fuses are also latched on power-up.
All Atmel microcontrollers have a three-byte signature code which identifies the device. This
code can be read in both serial and High-voltage Programming mode, also when the device is
locked. The three bytes reside in a separate address space. The ATtiny261/461/861signature
bytes are given in
Table 18-6.
Fuse Low Byte
CKDIV8
CKOUT
SUT1
SUT0
CKSEL3
CKSEL2
CKSEL1
CKSEL0
Parts
ATtiny261
ATtiny461
ATtiny861
1. See
2. Allows system clock to be output on pin. See
3. The default value results in maximum start-up time for the default clock source. See
4. The default setting results in internal RC Oscillator @ 8.0 MHz. See
(2)
(1)
on page 28
details.
Fuse Low Byte
Device ID
“System Clock Prescaler” on page 31
Table
167.
Bit No
for details.
7
6
5
4
3
2
1
0
18-6.
Description
Divide clock by 8
Clock Output Enable
Select start-up time
Select start-up time
Select Clock source
Select Clock source
Select Clock source
Select Clock source
0x000
0x1E
0x1E
0x1E
Signature Bytes Address
for details.
“Clock Output Buffer” on page 32
0x001
0x91
0x92
0x93
“Reading Fuse and Lock Bits from
1 (unprogrammed)
Default Value
0 (programmed)
1 (unprogrammed)
0 (programmed)
0 (programmed)
0 (programmed)
1 (unprogrammed)
0 (programmed)
Table 6-6 on page 28
0x002
0x0C
0x0D
0x08
2588E–AVR–08/10
(3)
(4)
(4)
(4)
for details.
(3)
(4)
Table 6-7
for

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